• Proceedings of the IEEK Conference
• /
• 2006.06a
• /
• pp.411-412
• /
• 2006

In this paper, we proposed a fast algorithm for inter prediction included the most complexity in H.264/AVC. It decide search range according to direction of predicted motion vector, and then perform adaptive candidate spiral search. Simultaneously, it perform motion estimation of variable loop with threshold for variable block size. Conclusively, it is implemented in JM FME with high complexity applying to rate-distortion optimization. Experimental results show that significant complexity reduction is achieved while the degradation in video quality is negligible.

• The Transactions of the Korea Information Processing Society
• /
• v.7 no.1
• /
• pp.306-312
• /
• 2000

In this paper, the efficient architecture of small Reed-solomon architecture is suggested. Here, 3-stage pipeline is adopted. In decoding, error-location polynomials are obtained by BMA using fast iteration method, and syndrome polynomials, where calculation complexity is required, are obtained by parallel calculation using ROM table, and the roots of error location polynomial are calculated by ROM table using Chein search algorithm. In the suggested decoder, it is confirmed that 3 symbol random errors can be corrected and 124Mbps decoding rate is obtained using 25 Mhz system clock.

• Proceedings of the Korea Information Processing Society Conference
• /
• 2000.10b
• /
• pp.883-886
• /
• 2000

Two fast search algorithms are proposed for VQ encoding in subband/VQ coding schemes. These algorithms exploit the property of the transform domain that the large coefficients rarely exist in the decomposed subbands. And the exit condition of PDE algorithm can be satisfied by comparing the large values of the codeword with the corresponding ones of the input vector. The computational complexity can be reduced at the expense of memories without extra coding errors.

• ETRI Journal
• /
• v.31 no.6
• /
• pp.784-794
• /
• 2009

We present a full HD (1080p) H.264/AVC High Profile hardware encoder based on fast motion estimation (ME). Most processing cycles are occupied with ME and use external memory access to fetch samples, which degrades the performance of the encoder. A novel approach to fast ME which uses shared multibank memory can solve these problems. The proposed pixel subsampling ME algorithm is suitable for fast motion vector searches for high-quality resolution images. The proposed algorithm achieves an 87.5% reduction of computational complexity compared with the full search algorithm in the JM reference software, while sustaining the video quality without any conspicuous PSNR loss. The usage amount of shared multibank memory between the coarse ME and fine ME blocks is 93.6%, which saves external memory access cycles and speeds up ME. It is feasible to perform the algorithm at a 270 MHz clock speed for 30 frame/s real-time full HD encoding. Its total gate count is 872k, and internal SRAM size is 41.8 kB.

• Journal of the Institute of Electronics Engineers of Korea SP
• /
• v.47 no.2
• /
• pp.69-76
• /
• 2010

This paper proposed a new fast multi-reference frame motion estimation algorithm. The proposed algorithm reduces search areas of motion estimation using a linear relation of motion vector with distance of each reference frame. New algorithm executes full search area motion estimation in reference frame 0 and reference frame 1. After that, search areas in reference frame 2, reference frame 3 and reference frame 4 are minimized by distance of each reference frame and results of motion estimation in reference frame 0 and reference frame 1. The proposed algorithm does not use a threshold value which is obstacle of hardware implementation and processing time schedule. Also, it reduced computation quantity of multi-reference motion estimation. Hardware implementation of multi-reference frame motion estimation is possible by these features. Simulation results show that PSNR drop and bitrate increase of proposed algorithm are lower than those of previous fast multi-reference frame motion estimation algorithm The number of computation of new algorithm is reduced 52.5% and quality of result is negligible when compared with full search area motion estimation which has 5 reference frames.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.21 no.3
• /
• pp.594-600
• /
• 2017

This paper proposes a global search based motion estimation algorithm for high performance HEVC encoder and its hardware architecture. To eliminate temporal redundancy, motion estimation in HEVC inter-view prediction uses global search and fast search algorithm to search for a predicted block having a high correlation with the current PU in an interpolated reference picture. The global search method predicts the motion of all candidate blocks in a given search area, thus ensuring optimal results, but has a disadvantage of large computation time. Therefore we propose a new algorithm that reduces computational complexity by reusing SAD operation in global search to reduce computation time of inter prediction. As a result of applying the proposed algorithm to standard software HM16.12, the computation time was reduced by 61%, BDBitrate by 11.81%, and BDPSNR by about 0.5% compared with the existing search algorithm. As a result of hardware design, the maximum operating frequency is 255 MHz and the total number of gates is 65.1K.

• International Journal of Naval Architecture and Ocean Engineering
• /
• v.12 no.1
• /
• pp.596-604
• /
• 2020

Previous studies on pipe auto-routing algorithms generally used such algorithms as A*, Dijkstra, Genetic Algorithm, Particle Swarm Optimization, and Ant Colony Optimization, to satisfy the relevant constraints of its own field and improve the output quality. On the other hand, this study aimed to significantly improve path-finding speed by applying the Jump Point Search (JPS) algorithm, which requires lower search cost than the abovementioned algorithms, for pipe routing. The existing JPS, however, is limited to two-dimensional spaces and can only find the shortest path. Thus, it requires several improvements to be applied to pipe routing. Pipe routing is performed in a three-dimensional space, and the path of piping must be parallel to the axis to minimize its interference with other facilities. In addition, the number of elbows must be reduced to the maximum from an economic perspective, and preferred spaces in the path must also be included. The existing JPS was improved for the pipe routing problem such that it can consider the above-mentioned problem. The fast path-finding speed of the proposed algorithm was verified by comparing it with the conventional A* algorithm in terms of resolution.

• KSII Transactions on Internet and Information Systems (TIIS)
• /
• v.8 no.3
• /
• pp.735-748
• /
• 2014

The fault-tolerance routing problem is one of the most important issues in the application of the Internet of Things, and has been attracting growing research interests. In order to maintain the communication paths from source sensors to the macronodes, we present a hybrid routing scheme and model, in which alternate paths are created once the previous routing is broken. Then, we propose an improved efficient and intelligent fault-tolerance algorithm (IEIFTA) to provide the fast routing recovery and reconstruct the network topology for path failure in the Internet of Things. In the IEIFTA, mutation direction of the particle is determined by multi-swarm evolution equation, and its diversity is improved by the immune mechanism, which can improve the ability of global search and improve the converging rate of the algorithm. The simulation results indicate that the IEIFTA-based fault-tolerance algorithm outperforms the EARQ algorithm and the SPSOA algorithm due to its ability of fast routing recovery mechanism and prolonging the lifetime of the Internet of Things.

• Proceedings of the Korean Society of Broadcast Engineers Conference
• /
• 2009.01a
• /
• pp.278-281
• /
• 2009

In this paper, we propose a fast partial distortion algorithm using normalized dithering matching scan to get uniform distribution of partial distortion which can reduce only unnecessary computation significantly. Our algorithm is based on normalized dithering order matching scan and calibration of threshold error using LOG value for each sub-block continuously for efficient elimination of unlike candidate blocks while keeping the same prediction quality compared with the full search algorithm. Our algorithm reduces about 60% of computations for block matching error compared with conventional PDE (partial distortion elimination) algorithm without any prediction quality, and our algorithm will be useful to real-time video coding applications using MPEG-4 AVC or MPEG-2.

• KSII Transactions on Internet and Information Systems (TIIS)
• /
• v.8 no.4
• /
• pp.1178-1191
• /
• 2014

The fault-tolerance routing problem is one of the most important issues in the application of the Internet of Things, and has been attracting growing research interests. In order to maintain the communication paths from source sensors to the macronodes, we present a hybrid routing scheme and model, in which alternate paths are created once the previous routing is broken. Then, we propose an improved efficient and intelligent fault-tolerance algorithm (IEIFTA) to provide the fast routing recovery and reconstruct the network topology for path failure in the Internet of Things. In the IEIFTA, mutation direction of the particle is determined by multi-swarm evolution equation, and its diversity is improved by the immune mechanism, which can improve the ability of global search and improve the converging rate of the algorithm. The simulation results indicate that the IEIFTA-based fault-tolerance algorithm outperforms the EARQ algorithm and the SPSOA algorithm due to its ability of fast routing recovery mechanism and prolonging the lifetime of the Internet of Things.