• Journal of the Korea Society of Computer and Information
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• v.20 no.5
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• pp.1-12
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• 2015

NAND flash memory has being used for storage systems widely, because it has good features which are low-price, low-power and fast access speed. However, NAND flash memory has an in-place update problem, and therefore it needs FTL(flash translation layer) to run for applications based on hard disk storage. The FTL includes complex functions, such as address mapping, garbage collection, wear leveling and so on. Futhermore, implementation of the FTL on low-power embedded systems is difficult due to its memory requirements and operation overhead. Accordingly, many index data structures for NAND flash memory have being studied for the embedded systems. Overall performances of the index data structures are enhanced by a decreasing of page write counts, whereas it has increased page read counts, as a side effect. Therefore, we propose an index management method using a page mapping log table in $B^+$-Tree based on NAND flash memory to decrease page write counts and not to increase page read counts. The page mapping log table registers page address information of changed index node and then it is exploited when retrieving records. In our experiment, the proposed method reduces the page read counts about 61% at maximum and the page write counts about 31% at maximum, compared to the related studies of index data structures.

• Journal of KIISE:Computing Practices and Letters
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• v.15 no.11
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• pp.836-840
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• 2009

Many researchers have studied flash memory in order to replace hard disk storages. Many FTL algorithms have been proposed to overcome physical constraints of flash memory such as erase-before-write, wear leveling, and poor write performance. Therefore, these constraints should be considered for testing FTL algorithms and the performance evaluation of flash memory. As doing the experiments, we suffer from several problems with costs and settings in experimental configuration. When we, for example, replay the traces of Oracle to evaluate the I/O performance with flash memory, it is hard to extract exact traces of I/O operations in Oracle. Since there are only write operations in the log, it is impossible to gather read operations. In MySQL and SQLite, we can gather the read operations by changing I/O functions in the source codes. But it is not easy to search for the exact points about I/O and even if we can find out the points, we might get wrong results depending on how we modify source codes to get I/O traces. The FlaSim proposed in this paper removes the difficulties when we evaluate the performance of FTL algorithms and flash memory. Our Linux drivers emulate the flash memory as a hard disk. And we can easily obtain the usage statistics of flash memory such as the number of write, read, and erase operations. The FlaSim can be gracefully extended to support the additional modules implemented by novel algorithms and ideas. In this paper, we describe the structure of FTL emulator, development tools and operating methods. We expect this emulator to be helpful for many experiments and research with flash memory.

• Journal of the Korea Society of Computer and Information
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• v.15 no.8
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• pp.23-30
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• 2010

Flash memory is non-volatile and can retain data even after system is powered off. Besides, it has many other features such as fast access speed, low power consumption, attractive shock resistance, small size, and light-weight. As its price decreases and capacity increases, the flash memory is expected to be widely used in consumer electronics, embedded systems, and mobile devices. Flash storage systems generally adopt a software layer, called FTL. In this research, we proposed a new FTL mechanism for overcoming the major drawback of conventional block mapping algorithm. In addition to the block mapping table, a index block mapping table with a small size is used to indicate sector location. The proposed indexed block mapping algorithm by adding a small size. By the simulation result, the proposed FTL provides an enhanced speed than a conventional hybrid mapping algorithm by around 45% in average, and the requirement of mapping memory is also reduced by around 12%.

• Journal of the Korea Society of Computer and Information
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• v.22 no.2
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• pp.1-7
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• 2017

Recently, NAND flash memory, which is used as a storage medium, is replacing HDD (Hard Disk Drive) at a high speed due to various advantages such as fast access speed, low power, and easy portability. In order to apply NAND flash memory to a computer system, a Flash Translation Layer (FTL) is indispensably required. FTL provides a number of features such as address mapping, garbage collection, wear leveling, and hot data identification. In particular, hot data identification is an algorithm that identifies specific pages where data updates frequently occur. Hot data identification helps to improve overall performance by identifying and managing hot data separately. MHF (Multi hash framework) technique, known as hot data identification technique, records the number of write operations in memory. The recorded value is evaluated and judged as hot data. However, the method of counting the number of times in a write request is not enough to judge a page as a hot data page. In this paper, we propose hot data identification which considers not only the number of write requests but also the persistence of write requests.

• Journal of KIISE:Computer Systems and Theory
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• v.35 no.1
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• pp.18-29
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• 2008

NAND Flash memory has been growing popular storage device for the last years because of its low power consumption, fast access speed, shock resistance and light weight properties. However, it has the distinct characteristics such as erase-before-write architecture, asymmetric read/write/erase speed, and the limitation on the number of erasure per block. Due to these limitations, various Flash Translation Layers (FTLs) have been proposed to effectively use NAND flash memory. The systems that adopted the conventional FTL may result in severe performance degradation by the hot data which are frequently requested data for overwrite in the same logical address. In this paper, we propose a novel FTL algorithm called Adaptive Flash Translation Layer (AFTL) which uses sector mapping method for hot data and log-based block mapping method for cold data. Our system removes the redundant write operations and the erase operations by the separating hot data from cold data. Moreover, the read performance is enhanced according to sector translation that tends to use a few read operations. A series of experiments was organized to inspect the performance of the proposed method, and they show very impressive results.

• Journal of KIISE:Computing Practices and Letters
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• v.15 no.12
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• pp.918-922
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• 2009

Naturally, block mapping FTL works well for sequential writes while page mapping FTL does well for random writes. To exploit their advantages, a practical FTL should be able to selectively apply a suitable scheme between page and block mappings for each write pattern. To meet that requirement, we propose a hybrid mapping FTL, which we call Janus-FTL, that distributes data to either block or page mapping areas. Also, we propose the fusion operation to relocate the data from block mapping area to page mapping area and the defusion operation to relocate the data from page mapping area to block mapping area. And experimental results of Janus-FTL show performance improvement of maximum 50% than other hybrid mapping FTLs.

• IEMEK Journal of Embedded Systems and Applications
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• v.13 no.3
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• pp.109-116
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• 2018

SSDs that are not allowed in-place update within the allocated page cause another allocation of a new page that will replace the previous page at the moment data modification occurs. This intrinsic characteristic of SSDs requires many changes to the existing HDD-based IO theory. In this paper, we conduct a performance comparison of FTL caching strategy in perspective of cache hashing (Global vs. grouped) and caching algorithm (LRU vs. NUR) through a simulation. Experimental results show that in terms of energy consumption for flash operation the grouped management of cache is not suitable and NUR algorithm is superior to LRU algorithm. In particular, we found that the cache hit ratio of LRU algorithm is about 10% point higher than that of NUR algorithm while the energy consumption of LRU algorithm is about 32% high.

• Proceedings of the Korea Information Processing Society Conference
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• 2009.11a
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• pp.71-72
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• 2009

플래시 메모리은 많은 부분에서 기존의 저장장치인 HDD에 비해 좋은 성능을 지녔다. 하지만 HDD와는 달리 데이터의 덮어쓰기가 허용 되지 않는다. 이 문제를 해결하기 위해 플래시 메모리는 FTL(Flash Translation Layer)을 사용하고 있으며, FTL을 통해 기존의 저장장치와 동일하게 사용할 수 있다. FTL들 중 로그영역을 사용하여 성능을 개선한 것들이 많은데, 로그영역의 사용으로 인해 읽기/쓰기 작업시 반드시 로그영역을 탐색을 해야만 했다. 본 논문에서는 카운팅 블룸필터(Counting bloom filter)를 활용하여 불필요한 로그영역 탐색을 줄이는 기법을 제안하였고, 실험을 통해 로그영역에 최신 데이터가 없는 경우 탐색횟수를 크게 줄일 수 있는 것을 확인하였다.

• Journal of KIISE
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• v.44 no.11
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• pp.1130-1137
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• 2017

The multi-leveling technique that stores multiple bits in a single memory cell has significantly improved the density of NAND flash memory along with shrinking processes. However, because of the side effects of the multi-leveling technique, the average write performance of MLC NAND flash memory is degraded more than twice that of SLC NAND flash memory. In this paper, we introduce existing cross-layer optimization techniques proposed to improve the performance of MLC NAND flash-based storages, and propose a new integration technique that overcomes the limitations of existing techniques by exploiting their complementarity. By fully exploiting the performance asymmetry in MLC NAND flash devices at the flash translation layer, the proposed technique can handle many write requests with the performance of SLC NAND flash devices, thus significantly improving the performance of NAND flash-based storages. Experimental results show that the proposed technique improves performance 39% on average over individual techniques.

• The KIPS Transactions:PartD
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• v.18D no.3
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• pp.157-168
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• 2011

Recently flash memory has been being utilized as a main storage device in mobile devices, and flashSSDs are getting popularity as a major storage device in laptop and desktop computers, and even in enterprise-level server machines. Unlike HDDs, on flash memory, the overwrite operation is not able to be performed unless it is preceded by the erase operation to the same block. To address this, FTL(Flash memory Translation Layer) is employed on flash memory. Even though the modified data block is overwritten to the same logical address, FTL writes the updated data block to the different physical address from the previous one, mapping the logical address to the new physical address. This enables flash memory to avoid the high block-erase cost. A flashSSD has an array of NAND flash memory packages so it can access one or more flash memory packages in parallel at once. To take advantage of the internal parallelism of flashSSDs, it is beneficial for DBMSs to request I/O operations on sequential logical addresses. However, the B-tree structure, which is a representative index scheme of current relational DBMSs, produces excessive I/O operations in random order when its node structures are updated. Therefore, the original b-tree is not favorable to SSD. In this paper, we propose AS(Always Sequential) B-tree that writes the updated node contiguously to the previously written node in the logical address for every update operation. In the experiments, AS B-tree enhanced 21% of B-tree's insertion performance.