• Title/Summary/Keyword: FPGA Chirp Signal

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Performance Characteristics of a Chirp Data Acquisition and Processing System for the Time-frequency Analysis of Broadband Acoustic Scattering Signals from Fish Schools (어군에 의한 광대역 음향산란신호의 시간-주파수 분석을 위한 chirp 데이터 수록 및 처리 시스템의 성능특성)

  • Lee, Dae-Jae
    • Korean Journal of Fisheries and Aquatic Sciences
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    • v.51 no.2
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    • pp.178-186
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    • 2018
  • A chirp-echo data acquisition and processing system was developed for use as a simplified, PC-based chirp echo-sounder with some data processing software modules. The design of the software and hardware system was implemented via a field-programmable gate array (FPGA). Digital signal processing algorithms for driving a single-channel chirp transmitter and dual-channel receivers with independent TVG (time varied gain) amplifier modules were incorporated into the FPGA for better real-time performance. The chirp-echo data acquisition and processing system consisted of a notebook PC, an FPGA board, and chirp sonar transmitter and receiver modules, which were constructed using three chirp transducers operating over a frequency range of 35-210 kHz. The functionality of this PC-based chirp echo-sounder was tested in various field experiments. The results of these experiments showed that the developed PC-based chirp echo-sounder could be used in the acquisition, processing and analysis of broadband acoustic echoes related to fish species identification.

Wideband Chirp Signal Generation for W-Band SAR (W-대역 영상레이다를 위한 광대역 Chirp 신호 발생장치)

  • Lee, Myung-Whan;Jung, Jin Mi;Lee, Jun Sub;Singh, Ashisg Kumar;Kim, Yong Hoon
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.29 no.2
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    • pp.138-141
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    • 2018
  • In this paper, we describe the designed digital waveform of a linear frequency-modulated (FM) chirp signal using field-programmable gate arrays (FPGAs) for image radar, and this signal is modulated with an I-Q modulator, and multiplied by 24 frequency multipliers to obtain a 94-GHz W-band wideband chirp generator. The developed chirp generator is an FM signal with a 94-GHz carrier frequency and a 960-MHz bandwidth, and the flatness is less than 1.0 dB at intermediate frequency (IF) (3.9 GHz), 2.0 dB in the W-band, and it has a 0.3-W output power in the W-band.

Design and Implementation of CTM for SAR Payload (위성 SAR 탑재체용 파형발생수신모듈 설계 및 제작)

  • Kim, Dong-Sik;Kim, Hyun-Chul;Yu, Kyung-deok;Heo, John;Woo, Jae-Choon;Lee, Sang-Gyu;Lee, Hyeon-Cheol;Ryu, Sang-Burm
    • Journal of the Korean Society for Aeronautical & Space Sciences
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    • v.50 no.2
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    • pp.119-125
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    • 2022
  • In this paper, we present design, implementation and test results of CTM (Chirp Transceiver Module) EM (Engineering Model) for C-Band SAR (Synthetic Aperture Radar) Payload. The CTM is designed to operate dual frequency scan method that simultaneously operate two frequencies in each 50MHz bandwidth to achieve 120Km swath with 10m resolution at about 500Km altitude. The CTM used radiation tolerant RTG4 FPGA for space environment, and implemented with the Parallel DDS (PDDS) method which uses a small memory capacity compared to the memory-map method. Test results show high purity chirp signal generation and excellent IRF performance from received chirp signal after direct digital conversion.

Implementation of Chaotic UWB Systems for Low Rate WPAN

  • Lee, Cheol-Hyo;Kim, Jae-Young;Kim, Young-Kkwan;Choi, Sun-Kyu;Jang, Ui-Gi
    • Proceedings of the Korea Society of Information Technology Applications Conference
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    • 2005.11a
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    • pp.339-342
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    • 2005
  • In order to support ultrawide-band signal generation for low rate WPAN, several types of signal generation mechanisms are suggested such as Chaos, Impluse, and Chirp signals by the activity of IEEE 802.15.4a. The communication system applied chaos theory may have ultrawide-band characteristics with spread spectrum and immunity from multipath effect. In order to use the advantage of chaotic signal generation, we introduce the system implementation of communication and networking systems with the chaos UWB signal. This system may be composed of mainly three parts in hardware architecture : RF transmission with chaotic signal generation, signal receiver using amplifiers and filters, and 8051 & FPGA unit. The most difficult part is to implement the chaotic signal generator and build transceiver with it. The implementation of the system is devidced into two parts i.e. RF blocks and digital blocks with amplifiers, filters, ADC, 8051 processor, and FPGA. In this paper, we introduce the system block diagram for chaotic communications. Mainly the RF block is important for the system to have good performance based on the chaotic signal generator. And the main control board functions for controlling RF blocks, processing Tx and Rx data, and networking in MAC layer.

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A Design Method for Pre-Distortion Compensation of SAR Chirp Signal based on Envelop Sampling and Interpolation Filter (위성 탑재 영상레이다 첩 신호의 전치왜곡 보상을 위한 포락선 샘플링 및 보간 필터 기반의 설계 기법)

  • Lee, Young-Bok
    • Journal of the Korea Institute of Military Science and Technology
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    • v.25 no.4
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    • pp.347-354
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    • 2022
  • The synthetic aperture radar(SAR) is an equipment that can acquire images in all weathers day and night based on radar signals. The on-board processor of satellite SAR generates transmission signal by digital signal processing, converts it into an analog signal and transmits to antenna. Until the transmission signal generated by on-board processor is output, the signal passes the transmission cables and analog devices. At this time, these hardware distort the signal and makes SAR performance worse. To improve the performance, pre-distortion technique is used. But, general pre-distortion using taylor series is not sufficient to compensate for the distortion. This paper suggests transmit signal design method with improved pre-distortion. This paper uses envelop sampling method and interpolation filter for frequency domain compensation. The proposed method accurately compensates the hardware distortion and reduces resource usage of FPGA. To analyze proposed method's performance, IRF characteristics are compared when the proposed method applies to signal with errors.

A Development of DDS Based Chirp Signal Generator and X-Band Transmitter-Receiver for Small SAR Sensor (DDS 기반의 소형 SAR 시스템 송수신장비 개발)

  • Song, Kyoung-Min;Lee, Ki-Woong;Lee, Chang-Hyun;Lee, Woo-Kyung;Lee, Myeong-Jin
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.27 no.3
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    • pp.326-329
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    • 2016
  • UAVs(Unmanned Aerial Vehicle) can be used in variant fields fornot only combat, but also recon, observation and exploration. Moreover, UAVs capacity can be expanded to impossible missions for existing surveillance system such as SAR(Synthetic Aperture Radar) technology that collecting images from all weather conditions. In recent days, with development of highly efficient IC and lightened system technology, there are significant increase of researches and demands to make SAR sensor as a payload of UAV. Therefore, this paper contains development process and results of small signal generator and RF device as a core module of SAR system based on the digital device of DDS.

Development of Human Detection Algorithm for Automotive Radar (보행자 탐지용 차량용 레이더 신호처리 알고리즘 구현 및 검증)

  • Hyun, Eugin;Jin, Young-Seok;Kim, Bong-Seok;Lee, Jong-Hun
    • Transactions of the Korean Society of Automotive Engineers
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    • v.25 no.1
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    • pp.92-102
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    • 2017
  • For an automotive surveillance radar system, fast-chirp train based FMCW (Frequency Modulated Continuous Wave) radar is a very effective method, because clutter and moving targets are easily separated in a 2D range-velocity map. However, pedestrians with low echo signals may be masked by strong clutter in actual field. To address this problem, we proposed in the previous work a clutter cancellation and moving target indication algorithm using the coherent phase method. In the present paper, we initially composed the test set-up using a 24 GHz FMCW transceiver and a real-time data logging board in order to verify this algorithm. Next, we created two indoor test environments consisting of moving human and stationary targets. It was found that pedestrians and strong clutter could be effectively separated when the proposed method is used. We also designed and implemented these algorithms in FPGA (Field Programmable Gate Array) in order to analyze the hardware and time complexities. The results demonstrated that the complexity overhead was nearly zero compared to when the typical method was used.