• The KIPS Transactions:PartA
• /
• v.14A no.3 s.107
• /
• pp.141-146
• /
• 2007

In this paper, we proposed an efficient FPGA-based simulation acceleration method based on FPGA compilation avoidance, which can effectively decrease the long debugging turnaround time incurred from the every debugging process in the functional verification. The proposed method had been experimentally applied to the functional verification for a microcontroller design. It had clearly shown that the debugging turnaround time was greatly reduced while the high simulation speed of the simulation acceleration was still maintained.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.10 no.3
• /
• pp.413-420
• /
• 2006

In this thesis, a RFID baseband system is implemented based on the international standard ISO/IEC 18000-6 Type-B using FPCA, and also anti-collision algorithm is implemented to improve the system performance. We compares the performance of the proposed anti-collision algorithm with that binary tree algorithm and bit-by-bit algorithm, and also validated analytic results using OPNET simulation. The proposed algorithm for Type-B transmission protocol and collision prohibition was designed using ISE7.1i which is a FPGA design-tool of Xilinx and implemented with Spartan2 chip which is a FPGA device.

• The Korean Journal of Applied Statistics
• /
• v.32 no.1
• /
• pp.149-160
• /
• 2019

The electricity consumption time series data of 'A' University from July 2016 to June 2017 is analyzed via nonparametric functional data clustering since the time series data can be regarded as realization of continuous functions with dependency structure. We use a Bouveyron and Jacques (Advances in Data Analysis and Classification, 5, 4, 281-300, 2011) method based on model-based functional clustering with an FEM algorithm that assumes a Gaussian distribution on functional principal components. Clusterwise analysis is provided with cluster mean functions, densities and cluster profiles.

• Journal of the Korea Academia-Industrial cooperation Society
• /
• v.10 no.4
• /
• pp.753-758
• /
• 2009

Recently the high-end CMOS image sensors are developed, conforming to the SMIA CCP2 specification, which is a high-speed low-power serial interface based on LVDS technology. But this kind of technology trend makes the existing equipments are no longer useful, although their capability is still good enough to handle the recent image sensors if there was no interfacing problem. In this paper, we propose and realize a data protocol conversion system that translates the SMIA CCP2 serial signals into the existing 10-bit parallel signals. The proposed system is composed of a de-serializer and a FPCA chip, and thus can be constructed on a small PCB which enables easy integration between the existing equipments and the new high-end image sensors. Besides, the maximum transfer rate by the SMIA specification is also achieved on the implemented system. So it is expected that the implemented system can be used as a general-purpose protocol converter in a variety of sensor-related application fields.