• International Journal of Computer Science & Network Security
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• v.22 no.2
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• pp.167-174
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• 2022

Vehicular Ad hoc Networks are considered as special kind of Mobile Ad Hoc Networks. VANETs are a new emerging recently developed, advanced technology that allows a wide set of applications related to providing more safety on roads, more convenience for passengers, self-driven vehicles, and intelligent transportation systems (ITS). Delay Tolerant Networks (DTN) are networks that allow communication in the event of connection problems, such as delays, intermittent connections, high error rates, and so on. Moreover, these are used in areas that may not have end-to-end connectivity. The expansion from DTN to VANET resulted in Vehicle Delay Tolerant Networks (VDTN). In this approach, a vehicle stores and carries a message in its buffer, and when the opportunity arises, it forwards the message to another node. Carry-store-forward mechanisms, packets in VDTNs can be delivered to the destination without clear connection between the transmitter and the receiver. The primary goals of routing protocols in VDTNs is to maximize the probability of delivery ratio to the destination node, while minimizing the total end-to-end delay. DTNs are used in a variety of operating environments, including those that are subject to failures and interruptions, and those with high delay, such as vehicle ad hoc networks (VANETs). This paper discusses DTN routing protocols belonging to unicast delay tolerant position based. The comparison was implemented using the NS2 simulator. Simulation of the three DTN routing protocols GeOpps, GeoSpray, and MaxProp is recorded, and the results are presented.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.40 no.12
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• pp.136-144
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• 2003

In this paper, we propose a scheme that can control the loss probability of low priority class bursts by dynamically adjusting the assembly threshold of low priority class. The key ideas is that the loss Probability of the longer burst increases as the load increases, thus reduced low priority class burst length decreases the loss priority at high traffic load. To achieve this aim, we first derive the relation among the loss probability, the assembly threshold, and the traffic load. In this paper we derive the relation by curve fitting on the simulation results. The ingress edge routers periodically or by event-driven receives the proper corresponding assembly threshold information from the core routers. This assembly threshold is calculated from the derived relation so that the required loss probability of the low priority class bursts in the network is satisfied. The simulation results show that the proposed scheme performs well to meet the loss probability target as expected.

• Journal of Korea Water Resources Association
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• v.52 no.10
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• pp.719-728
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• 2019

Valve in water distribution network (WDN), that controls the flow in pipes, is used to isolate a segment (a part of WDN) under abnormal water supply conditions (e.g., pipe breakage, water quality failure event). The segment isolation degrades pressure and water serviceability in neighboring area during the water service outage of the segment. Recent hydraulic and water quality failure events reported encouraging WDN valve installation based on various abnormal water supply scenarios. This study introduces a scenario-based optimal valve installation approach to optimize the number of valves, the amount of undelivered water, and a shortest water supply path indicator (i.e., Hydraulic Geodesic Index). The proposed approach is demonstrated in the valve installation of Pescara network, and the optimal valve sets are obtained under multiple scenarios and compared to the existing valve set. Pressure-driven analysis (PDA) scheme is used for a network hydraulic simulation. The optimal valve set derived from the proposed method has 19 fewer valves than the existing valve set in the network and the amount of undelivered water was also lower for the optimal valve set. Reducing the reservoir head requires a greater number of valves to achieve the similar functionality of the WDN with the optimal valve set of the original reservoir head. This study also compared the results of demand-driven analysis (DDA) and the PDA and confirmed that the latter is required for optimal valve installation.

• Journal of KIISE:Information Networking
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• v.35 no.4
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• pp.326-336
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• 2008

Wireless sensor networks have been studied with two typical applications called event-driven and periodic monitoring. Although these applications have different core requirements, they have the same low latency requirement. However, main issue of the protocol in wireless sensor networks was focused on an energy efficiency, so it has not considered the latency problem. In this paper, we propose the RA-MAC, an energy efficient and low latency MAC protocol using a new channel access mechanism and the RTS Aggregation scheme for wireless sensor networks. Our simulation results show that the RA-MAC provides energy savings and latency reduction.

• Journal of KIISE:Computer Systems and Theory
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• v.30 no.9
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• pp.461-476
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• 2003

Due to the implementation ease and alleviation of memory bottleneck effect, NUMA architecture has dominated in the multiprocessor systems for the past several years. However, because the NUMA system distributes memory in each node, frequent remote memory access is a key factor of performance degradation. Therefore, efficient design of RAC(Remote Access Cache) in NUMA system is critical for performance improvement. In this paper, we suggest Multi-Grain RAC which can adaptively control the RAC line size, with respect to each application behavior Then we simulate NUMA system with multi-grain RAC using MINT, event-driven memory hierarchy simulator. and analyze the performance results. At first, with profile-based determination method, we verify the optimal RAC line size for each application and, then, we compare and analyze the performance differences among NUMA systems with normal RAC, with optimal line size RAC, and with multi-grain RAC. The simulation shows that the worst case can be always avoided and results are very close to optimal case with any combination of application and RAC format.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.27 no.1
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• pp.62-68
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• 2023

An aerial relay system utilizing an unmanned aerial vehicle(UAV) or drone is addressed for event-driven operations such as temporary communication services for disaster affected area, military and first responder support. UAV relay system (URS) targets to provide a reliable communication service to a remote user equipment or an operator, therefore, a fast UAV placement to guarantee a minimum quality of service(QoS) is important when an operation is requested. Researches on UAV utilization in communication systems mostly target to derive the optimal position of UAV to maximize the performance, however, fast deployment of UAV is much more important than optimal placement under emergency situations. To this end, this paper derives the feasible area for UAV placement, investigates the effect of performance requirements on that area, and suggests UAV placement to certainly guarantee the performance requirements. Simulation results demonstrate that the feasible area derived in this paper matches that obtained by an exhaustive search.

• Journal of KIISE:Computer Systems and Theory
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• v.31 no.12
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• pp.704-715
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• 2004

Recently, a single or multi processor system uses the hierarchical memory structure to reduce the time gap between processor clock rate and memory access time. A cache memory system includes especially two or three levels of caches to reduce this time gap. Moreover, one of the most important things In the hierarchical memory system is the hit rate in level 1 cache, because level 1 cache interfaces directly with the processor. Therefore, the high hit rate in level 1 cache is critical for system performance. A victim cache, another high level cache, is also important to assist level 1 cache by reducing the conflict miss in high level cache. In this paper, we propose the advanced high level cache management scheme based on the processor reuse information. This technique is a kind of cache replacement policy which uses the frequency of processor's memory accesses and makes the higher frequency address of the cache location reside longer in cache than the lower one. With this scheme, we simulate our policy using Augmint, the event-driven simulator, and analyze the simulation results. The simulation results show that the modified processor reuse information scheme(LIVMR) outperforms the level 1 with the simple victim cache(LIV), 6.7% in maximum and 0.5% in average, and performance benefits become larger as the number of processors increases.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.42 no.1
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• pp.9-26
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• 2005

In the pursuit of ever higher levels of performance, recent computer systems have made use of deep pipeline, dynamic scheduling and multi-issue superscalar processor technologies. In this situations, branch prediction schemes are an essential part of modem microarchitectures because the penalty for a branch misprediction increases as pipelines deepen and the number of instructions issued per cycle increases. In this paper, we propose a novel branch prediction scheme, direction-gshare(d-gshare), to improve the prediction accuracy. At first, we model a neural network with the components that possibly affect the branch prediction accuracy, and analyze the variation of their weights based on the neural network information. Then, we newly add the component that has a high weight value to an original gshare scheme. We simulate our branch prediction scheme using Simple Scalar, a powerful event-driven simulator, and analyze the simulation results. Our results show that, compared to bimodal, two-level adaptive and gshare predictor, direction-gshare predictor(d-gshare. 3) outperforms, without additional hardware costs, by up to 4.1% and 1.5% in average for the default mont of embedded direction, and 11.8% in maximum and 3.7% in average for the optimal one.