• 제목/요약/키워드: Erasable programmable Logic Device

검색결과 13건 처리시간 0.019초

DSP를 이용한 고해상도 스캐너 개발 (The Development of High Resolution Film Scanner Using DSP)

  • 김태현;최은석;백중환
    • 융합신호처리학회 학술대회논문집
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    • 한국신호처리시스템학회 2000년도 추계종합학술대회논문집
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    • pp.149-152
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    • 2000
  • 스캐너는 문서, 사진, 필름 등을 스캔하여 디지털 데이터로 출력하는 장비이다. 이 중에서도 필름 스캐너는 네거티브/포지티브 필름을 스캔할 수 있는 스캐너이다. 본 논문에서는 스캐너를 구성하는 스텝모터 제어부, 이미지센서부, A/D converter 제어부 등을 설계하고 고속 신호처리를 위해 DSP를 사용한다. 또한 이런 주변기기와 DSP의 인터페이스 회로는 사용자가 임의의 논리회로를 프로그램 하여 내장할 수 있는 EPLD(Erasable Programmable Logic Device)를 이용한다. 스캐너를 제어하고 스캔된 데이터를 PC로 전송하기 위해 PC와의 인터페이스는 parallel 포트를 사용하며 35mm 필름을 스캔할 경우 9백만 화소 이상(수평 해상도 3835, 수직 해상도 2592)의 고해상도를 얻을 수 있도록 하드웨어를 설계한다.

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DESIGN CONCEPT FOR SINGLE CHIP MOSAIC CCD CONTROLLER

  • HAN WONYONG;JIN Ho;WALKER DAVID D.;CLAYTON MARTIN
    • 천문학회지
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    • 제29권spc1호
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    • pp.389-390
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    • 1996
  • The CCDs are widely used in astronomical observations either in direct imaging use or spectroscopic mode. However, the areas of available sensors are too small for large imaging format. One possibility to obtain large detection area is to assemble mosaics of CCD, and drive them simultaneously. Parallel driving of many CCDs together rules out the possibility of individual tuning; however, such optimisation is very important, when the ultimate low light level performance is required, particularly for new, or mixed devices. In this work, a new concept is explored for an entirely novel approach, where the drive waveforms are multiplexed and interleaved. This simultaneously reduces the number of leadout connections and permits individual optimisation efficiently. The digital controller can be designed within a single EPLD (Erasable Programmable Logic Device) chip produced by a CAD software package, where most of the digital controller circuits are integrated. This method can minimise the component. count., and improve the system efficiency greatly, based on earlier works by Han et a1. (1996, 1994). The system software has an open architecture to permit convenient modification by the user, to fit their specific purposes. Some variable system control parameters can be selected by a user with a wider range of choice. The digital controller design concept allows great flexibility of system parameters by the software, specifically for the compatibility to deal with any number of mixed CCDs, and in any format, within the practical limit.

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새로운 3상 랜덤 펄스 위치 PWM기법에 의한 EPLD기반의 모터 속도제어 시스템 (EPLD based Induction Motor Drives with a New Three-Phase Randomized Pulse Position PWM Scheme)

  • 김회근;위석오;임영철;정영국;나석환
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2002년도 전력전자학술대회 논문집
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    • pp.308-312
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    • 2002
  • In this paper, EPLD(Erasable Programmable Logic Device) based induction motor drives with a SRP-PWM(Separatley Randomized Pulse Position PWM) is proposed. In the proposed RPWM (Random PWM), each of three phase pulses is located randomly in each switching interval. Based on the space vector modulation technique, the duty ratio of the pulses is calculated. To verify the validity of the proposed RPWM, the experimental study was tried. Along with the randomization of PWM pulses, the space vector modulation is also executed in the TMS320C31 DSP(Digital Signal Processor). The experimental results show that the voltage and switching noise harmonics are spread to a wide band area. Also, the performance of the proposed SRP-PWM and the conventional SVM-PWM are nearly the same from the viewpoing of the v/f constant control.

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