• 제목/요약/키워드: Encoder structure

검색결과 218건 처리시간 0.024초

Design and Implementation of a Latency Efficient Encoder for LTE Systems

  • Hwang, Soo-Yun;Kim, Dae-Ho;Jhang, Kyoung-Son
    • ETRI Journal
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    • 제32권4호
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    • pp.493-502
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    • 2010
  • The operation time of an encoder is one of the critical implementation issues for satisfying the timing requirements of Long Term Evolution (LTE) systems because the encoder is based on binary operations. In this paper, we propose a design and implementation of a latency efficient encoder for LTE systems. By virtue of 8-bit parallel processing of the cyclic redundancy checking attachment, code block (CB) segmentation, and a parallel processor, we are able to construct engines for turbo codings and rate matchings of each CB in a parallel fashion. Experimental results illustrate that although the total area and clock period of the proposed scheme are 19% and 6% larger than those of a conventional method based on a serial scheme, respectively, our parallel structure decreases the latency by about 32% to 65% compared with a serial structure. In particular, our approach is more latency efficient when the encoder processes a number of CBs. In addition, we apply the proposed scheme to a real system based on LTE, so that the timing requirement for ACK/NACK transmission is met by employing the encoder based on the parallel structure.

Optimization of a Systolic Array BCH encoder with Tree-Type Structure

  • Lim, Duk-Gyu;Shakya, Sharad;Lee, Je-Hoon
    • International Journal of Contents
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    • 제9권1호
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    • pp.33-37
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    • 2013
  • BCH code is one of the most widely used error correcting code for the detection and correction of random errors in the modern digital communication systems. The conventional BCH encoder that is operated in bit-serial manner cannot adequate with the recent high speed appliances. Therefore, parallel encoding algorithms are always a necessity. In this paper, we introduced a new systolic array type BCH parallel encoder. To study the area and speed, several parallel factors of the systolic array encoder is compared. Furthermore, to prove the efficiency of the proposed algorithm using tree-type structure, the throughput and the area overhead was compared with its counterparts also. The proposed BCH encoder has a great flexibility in parallelization and the speed was increased by 40% than the original one. The results were implemented on synthesis and simulation on FPGA using VHDL.

Fixed-Complexity Sphere Encoder for Multi-User MIMO Systems

  • Mohaisen, Manar;Chang, Kyung-Hi
    • Journal of Communications and Networks
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    • 제13권1호
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    • pp.63-69
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    • 2011
  • In this paper, we propose a fixed-complexity sphere encoder (FSE) for multi-user multi-input multi-output (MU-MIMO) systems. The proposed FSE accomplishes a scalable tradeoff between performance and complexity. Also, because it has a parallel tree-search structure, the proposed encoder can be easily pipelined, leading to a tremendous reduction in the precoding latency. The complexity of the proposed encoder is also analyzed, and we propose two techniques that reduce it. Simulation and analytical results demonstrate that in a $4{\times}4$ MU-MIMO system, the proposed FSE requires only 11.5% of the computational complexity needed by the conventional QR decomposition with M-algorithm encoder (QRDM-E). Also, the encoding throughput of the proposed encoder is 7.5 times that of the QRDM-E with tolerable degradation in the BER performance, while achieving the optimum diversity order.

낮은 연산 부담을 갖는 MPEG-4 AAC 인코더 개발에 관한 연구 (Development of an MPEG-4 AAC encoder of low implementation complexity)

  • 김병일;김동환;장태규;장흥엽
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2003년도 하계종합학술대회 논문집 Ⅳ
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    • pp.2467-2470
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    • 2003
  • This paper presents a new structure of MPEG-4 AAC encoder. The proposed encoder directly shapes quantization noise distribution according to the energy distribution curve and thereafter performs adjustment of the offset level of the noise distribution to meet the given bit rate. The direct noise shaping and the bit rate matching scheme of the proposed encoder algorithm significantly alleviate the problem of conventional encoder's processing burden related with the employment of the precise psychoacoustic model and iteration intensive quantizer. The encoder algorithm is implemented on ARM processor with fixed-feint arithmetic operations. The audio quality of the implemented system is observed comparable to those of commercially available encoders, white the complexity of the implementation is drastically reduced in comparison to the conventional encoder systems.

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광 부호 분할 다중접속 네트워크를 위한 파장/시간 2차원 코드의 새로운 부호기/복호기 (New Encoder/Decoder with Wavelength/Time 2-D Codes for Optical CDMA Network)

  • 황유모
    • 전기학회논문지
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    • 제58권5호
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    • pp.1035-1040
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    • 2009
  • We propose a new encoder/decoders based on an tune able wavelength converter(TWC) and an arrayed waveguide grating(AWG) router for large capacity optical CDMA networks. The proposed encoder/decoder treats codewords of wavelength/time 2-D code simultaneously using the dynamic code allocation property of the TWC and the cyclic property of the AWG router, and multiple subscribers can share the encoder/decoder in networks. Feasibility of the structure of the proposed encoder/decoder for dynamic code allocation is tested through simulations using two wavelength/time 2-D codes, which are the generalized multi-wavelength prime code(GMWPC) and the generalized multi-wavelength Reed-Solomon code(GMWRSC). Test results show that the proposed encoder/decoder can increase the channel efficiency not only by increasing the number of simultaneous users without any multiple-access interference but by using a relatively short length CDMA codes.

Pipe-line 구조를 갖는 Video Encoder 구현에 관한 연구 (A Study on Video Encoder Implementation having Pipe-line Structure)

  • 이인섭;이완범;김환용
    • 한국컴퓨터산업학회논문지
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    • 제2권9호
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    • pp.1183-1190
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    • 2001
  • 본 논문에서는 아날로그의 비디오 신호를 디지털로 부호화하는데 기존과 다른 파이프라인 방식을 사용하도록 하였다. 부호화기의 전체 동작을 화소 클럭비에 따른 파이프라인 구조로 설계하여 각 하위 블록들의 동작 타이밍을 확보하여 시스템을 안정화시켰으며 고정된 계수와 곱셈의 경우 기존의 ROM 테이블 또는 곱셈기 방식을 사용하지 않고 쉬프트와 덧셈기 방식으로 설계함으로써 시스템의 복잡도를 줄이며 논리 게이트 수를 15%줄이는 효과를 보였다. 설계된 부호화기는 각각의 하위 블록으로 나누어 VHDL로 설계하였고, Max+plusII를 이용한 FPGA로 동작 확인을 하였다.

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원격 측정 시스템 파라미터 실시간 업데이트 PCM 엔코더 구조 (PCM Encoder Structure for Real-time Updating of Telemetry System Parameters)

  • 박유광;윤원주
    • 한국항행학회논문지
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    • 제23권5호
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    • pp.452-459
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    • 2019
  • 본 논문에서는 원격 측정 시스템 파라미터에 대한 실시간 업데이트가 가능한 PCM (pulse code modulation) 엔코더 구조에 대해 기술한다. PCM 엔코더 내부에는 FPGA (filed programmable gate array), flash 메모리, 센서 데이터 계측을 위한 아날로그 신호 조절부를 구성하였다. PCM 엔코더의 FPGA 내부에 로직을 통해 UART (universal asynchronous receiver/transmitter) 통신, 아날로그 신호 조절부 제어, flash 메모리 제어, 프레임 구성이 가능하다. UART 통신을 이용해 PC에서 파라미터 데이터를 PCM 엔코더에게 송신할 수 있으며, flash 메모리가 제어되어 원격 계측 시스템의 파라미터가 실시간으로 업데이트 되어 최종적으로 프레임이 구성된다. 시뮬레이션과 검증을 통해 파라미터 데이터의 실시간 업데이트 여부에 대해 확인하였으며, 제안된 구조를 이용하여 유연성과 편의성을 높인 원격 계측 시스템을 구성할 수 있음을 확인하였다.

HEVC에서 인코더 계산 복잡도 개선 및 분할 정보 부호화 방법 (Improving Encoder Complexity and Coding Method of the Split Information in HEVC)

  • 이한수;김경용;김태룡;박광훈;김휘용;임성창;이진호
    • 방송공학회논문지
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    • 제17권2호
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    • pp.325-343
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    • 2012
  • 본 논문에서는 참조 프레임 혹은 시간적으로 이전에 부호화한 프레임을 통해 현재 프레임의 LCU 분할구조를 예측하여 부호화하는 방법을 제안한다. HEVC에서는 CU로 부호화 및 복호화를 수행하는데, CU의 기본이 되는 LCU 단위로 영상의 특성에 따라 분할구조를 결정하여 영상을 적응적으로 부호화한다. 이 때, 현재 부호화하려는 LCU의 분할구조와 참조 프레임 및 시간적으로 이전에 부호화한 프레임 내의 동일한 위치에 대응되는 LCU(Co-located LCU)의 분할구조는 매우 유사한 특성이 있다. 따라서 본 논문에서는 인코더의 복잡도를 낮추기 위하여 현재 LCU의 분할구조를 결정할 때, Co-located LCU의 복잡성을 통해 현재 부호화하는 LCU의 분할구조 정보를 예측하고 분할구조에 포함될 확률이 높은 CU만 부호화하는 방법을 제안한다. 제안 방법의 시뮬레이션 결과로서, 인코더만을 변경하여 인코더 복잡도를 낮추는 방법이 기존 대비 인코더 복잡도가 평균 21.3% 감소하였고, 디코더 복잡도는 거의 비슷했으며, BD-Bitrate는 최대 0.6% 증가하였다. 또한 인코더에서 분할구조를 결정할 때 LCU의 분할 정보를 예측하여 부호화하고, CU 분할 정보를 부호화 및 복호화하는 과정을 변경하는 방법을 통해 BD-Bitrate를 감소시키는 방법을 제안하였다. 제안 방법의 시뮬레이션 결과는 인코더 복잡도가 평균 22% 감소하였고, 디코더 복잡도는 거의 비슷했으며, BD-Bitrate는 최대 0.3% 정도만 증가하여 제안하는 방법의 우수함을 확인할 수 있었다.

SRM의 고정도 여자 제어를 위한 엔코더의 운전특성 (Driving Characteristics of Encoder for High Performance Excitation Control of SRM)

  • 강유정;안진우;박성준;김철우
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2001년도 전력전자학술대회 논문집
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    • pp.1-4
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    • 2001
  • SRM(Switched Reluctance Motor) uses reluctance torque by pulse excitation control. SRM drives are much studied in electrical vehicles and industrial application due to the simple, robust mechanical structure and high speed characteristics. For the high performance control of SRM, it is necessary to synchronize the stator phase excitation with the rotor position. This paper proposes a new encoder for high performance excitation control of SRM. The proposed encoder has complex structures of incremental and absolute encoder. An each phase inductance profile can be synchronized with 4-bit absolute position signal and incremental pulses are used for speed detection. Low cost and simple manufacturing of SRM encoder is possible.

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Deep Convolutional Auto-encoder를 이용한 환경 변화에 강인한 장소 인식 (Condition-invariant Place Recognition Using Deep Convolutional Auto-encoder)

  • 오정현;이범희
    • 로봇학회논문지
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    • 제14권1호
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    • pp.8-13
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    • 2019
  • Visual place recognition is widely researched area in robotics, as it is one of the elemental requirements for autonomous navigation, simultaneous localization and mapping for mobile robots. However, place recognition in changing environment is a challenging problem since a same place look different according to the time, weather, and seasons. This paper presents a feature extraction method using a deep convolutional auto-encoder to recognize places under severe appearance changes. Given database and query image sequences from different environments, the convolutional auto-encoder is trained to predict the images of the desired environment. The training process is performed by minimizing the loss function between the predicted image and the desired image. After finishing the training process, the encoding part of the structure transforms an input image to a low dimensional latent representation, and it can be used as a condition-invariant feature for recognizing places in changing environment. Experiments were conducted to prove the effective of the proposed method, and the results showed that our method outperformed than existing methods.