• Journal of the Korean Geographical Society
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• v.44 no.3
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• pp.240-259
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• 2009

This study aimed to reveal that a local city was recreated by tourism, and to discover a general process in which the regional identity as a tourist destination was reconstructed. Specifically, firstly, this study suggested that the social construction of cultural tourist destinations was composed of a series of dynamic stages such as 'reinterpretation', 'institutionalization', and 'recognition' conceptually. Secondly, the dynamic stages were analyzed on the ethnographic study of Otaru where the movement of preservation of the historical canal was raised and strategies to attract tourism had been implemented. Thirdly, a main mechanism acting on each stage was examined. In conclusion, it was shown that the region was reinterpreted through the politics of identity and the meaning was institutionalized through political and economic negotiation. Moreover, while being established as a constructed authenticity by politics of memory, the regional identity was embedded in the socio-spatial consciousness constantly.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.37 no.4C
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• pp.307-312
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• 2012

In this paper, we perform a complexity analysis for implementation of the ISO/IEEE 11073 Personal Health Device (PHD) standards in order to check the required system resources when ISO/IEEE 11073 PHD standards are implemented on the embedded system. Base on the implemented programs complying the PHD standards for a weighing scale, a blood pressure monitor, and a glucose meter among the various personal health devices, we make a pseudo-code. And then from the two different points of view such as program memory space and data memory space, we make a complexity analysis model. Because system resources or capability are strongly restricted in the personal health devices, our research work is very useful to estimate the required system resources.

• Smart Structures and Systems
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• v.21 no.3
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• pp.257-262
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• 2018

Vibrational problems in the domestic Small Horizontal Axis Wind Turbines (SHAWT) are due to flap wise vibrations caused by varying wind velocities acting perpendicular to its blade surface. It has been reported that monitoring the structural health of the turbine blades requires special attention as they are key elements of a wind power generation, and account for 15-20% of the total turbine cost. If this vibration problem is taken care, the SHAWT can be made as commercial success. In this work, Shape Memory Alloy (SMA) wires made of Nitinol (Ni-Ti) alloys are embedded into the Glass Fibre Reinforced Polymer (GFRP) wind turbine blade in order to reduce the flapwise vibrations. Experimental study of Nitinol (Ni-Ti) wire characteristics has been done and relationship between different parameters like current, displacement, time and temperature has been established. When the wind turbine blades are subjected to varying wind velocity, flapwise vibration occurs which has to be controlled continuously, otherwise the blade will be damaged due to the resonance. Therefore, in order to control these flapwise vibrations actively, a non-linear current controller unit was developed and fabricated, which provides actuation force required for active vibration control in smart blade. Experimental analysis was performed on conventional GFRP and smart blade, depicted a 20% increase in natural frequency and 20% reduction in amplitude of vibration. With addition of active vibration control unit, the smart blade showed 61% reduction in amplitude of vibration.

• The Transactions of the Korea Information Processing Society
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• v.7 no.2
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• pp.520-528
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• 2000

he speed of microprocessor getting faster, the data transfer width between the microprocessor and the memory becomes a critical part to limit the system performance. So the study of the computer architecture with the high code density is cmerged. In this paper, a tentative Bi-Length Instruction Set Computer(BISC) that consists of 16 bit and 32 bit length instructions is proposed as the high code density 32 bit microprocessor architecture. The 32 bit BISC has 16 general purpose registers and two kinds of instructions due to the length of offset and the size of immediate operand. The proposed 32 bit BISC is implemented by FPGA, and all of its functions are tested and verified at 1.8432MHz. And the cross assembler, the cross C/C++ compiler and the instruction simulator of the 32 bit BISC are designed and verified. This paper also proves that the code density of 32 bit BISC is much higher than the one of traditional architecture, it accounts for 130~220% of RISC and 130~140% of CISC. As a consequence, the BISC is suitable for the next generation computer architecture because it needs less data transfer width. And its small memory requirement offers that it could be useful for the embedded microprocessor.

• Journal of Satellite, Information and Communications
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• v.9 no.4
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• pp.73-76
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• 2014

With the increasing popularity of multi-core processors, they have been adopted even in embedded systems. Under this circumstance many multimedia applications can be parallelized on multi-core platforms because they usually require heavy computations and extensive memory accesses. This paper proposes an efficient thread-level parallel implementation for color space conversion on multi-core CPU. Thread-level parallelism has been becoming very useful parallel processing paradigm especially on shared memory computing systems. In this work, it is exploited by allocating different input pixels to each thread for concurrent loop executions. For the performance evaluation, this paper evaluate the performace improvements for color conversion on multi-core processors based on the processing speed comparison between its serial implementation and parallel ones. The results shows that thread-level parallel implementations show the overall similar ratios of performance improvements regardless of different multi-cores.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.14 no.1
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• pp.393-401
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• 2013

Most traditional databases exploit record-oriented storage model where the attributes of a record are placed contiguously in hard disk to achieve high performance writes. However, for search-mostly datawarehouse systems, column-oriented storage has become a proper model because of its superior read performance. Today, flash memory is largely recognized as the preferred storage media for high-speed database systems. In this paper, we introduce fast column-oriented database model and then propose a new column-aware index management scheme for the high-speed column-oriented datawarehouse system. Our index management scheme which is based on enhanced $B^+$-Tree achieves high search performance by embedded flash index and unused space compression in internal and leaf nodes. Based on the results of the performance evaluation, we conclude that our index management scheme outperforms the traditional scheme in the respect of the search throughput and response time.

• Journal of the Korean Society for Precision Engineering
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• v.30 no.1
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• pp.39-46
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• 2013

Smart material such as SMA (Shape Memory Alloy) has been studied in various ways because it can perform continuous, flexible, and complex actuation in simple structure. Smart soft composite (SSC) was developed to achieve large deformation of smart material. In this paper, a shell actuator using woven type SSC was developed to enhance stiffness of the structure while keeping its deformation capacity. The fabricated actuator consisted of a flexible polymer and woven structure which contains SMA wires and glass fibers. The actuator showed various actuation motions by controlling a pattern of applied electricity because the SMA wires are embedded in the structure as fibers. To verify the actuation ability, we measured its maximum end-edge bending angle, twisting angle, and actuating force, which were $103^{\circ}$, $10^{\circ}$, and 0.15 N, respectively.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.02a
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• pp.148-148
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• 2010

플래시 메모리로 대표되는 비휘발성 메모리는 IT 기술의 발달에 힘입어 급격한 성장세를 나타내고 있지만, 메모리 소자의 크기가 작아짐에 따라서 그 물리적 한계에 이르러 차세대 메모리에 대한 요구가 점차 높아지고 있는 실정이다. 따라서, 이러한 문제점에 대한 대안으로서 고속 동작 및 정보의 저장 시간을 향상 시킬 수 있는 nano-floating gate memory (NFGM)가 제안되었다. Nano-floating gate에서 사용되는 nanocrystal (NCs) 중에서 Si nanocrystal은 비휘발성 메모리뿐만 아니라 발광 소자 및 태양 전지 등의 매우 다양한 분야에 광범위하게 응용되고 있지만, NCs의 크기와 밀도를 제어하는 것이 가장 중요한 문제로 이를 해결하기 위해서 많은 연구가 진행되고 있다. 또한, 소자의 소형화가 이루어지면서 기존의 플래시 메모리 한계를 극복하기 위해서 터널베리어에 관한 관심이 크게 증가했다. 특히, 최근에 많은 주목을 받고 있는 개량형 터널베리어는 크게 VARIOT (VARIable Oxide Thickness) barrier와 CRESTED barrier의 두 가지 종류가 제안되어 있다. VARIOT의 경우에는 매우 얇은 두께의low-k/high-k/low-k 의 적층구조를 가지며, CRESTED barrier의 경우에는 반대의 적층구조를 가진다. 이와 같은 개량형 터널 베리어는 전계에 대한 터널링 전류의 감도를 증가시켜서 쓰기/지우기 특성을 향상시키며, 물리적인 절연막 두께의 증가로 인해 데이터 보존 시간의 향상을 달성할 수 있다. 본 연구에서는 박막의 $SiO_2$와 $Si_3N_4$를 적층한 VARIOT 타입의 개량형 터널 절연막 위에 전하 축적층으로 $SiN_x$층의 내부에 Si-NCs를 갖는 비휘발성 메모리 소자를 제작하였다. Si-NCs를 갖지 않는 $SiN_x$전하 축적층은 Si-NCs를 갖는 전하 축적층보다 더 작은 메모리 윈도우와 열화된 데이터 보존 특성을 나타내었다. 또한, Si-NCs의 크기가 감소됨에 따라 양자 구속 효과가 증가되어 느린 지우기 속도를 보였으나, 데이터 보존 특성이 크게 향상됨을 알 수 있었다. 그러므로, NFGM의 빠른 쓰기/지우기 속도와 데이터 보존 특성을 동시에 만족하기 위해서는 Si-NCs의 크기 조절이 매우 중요하며, NCs크기의 최적화를 통하여 고집적/고성능의 차세대 비휘발성 메모리에 적용될 수 있을 것이라 판단된다.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.29 no.8C
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• pp.1113-1124
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• 2004

In this paper, we proposed a hardware(H/W) structure which can compress and recontruct the input image in real time operation and implemented it into a FPGA platform using VHDL(VHSIC Hardware Description Language). All the image processing element to process both compression and reconstruction in a FPGA were considered each of them was mapped into H/W with the efficient structure for FPGA. We used the DWT(discrete wavelet transform) which transforms the data from spatial domain to the frequency domain, because use considered the motion JPEG2000 as the application. The implemented H/W is separated to both the data path part and the control part. The data path part consisted of the image processing blocks and the data processing blocks. The image processing blocks consisted of the DWT Kernel fur the filtering by DWT, Quantizer/Huffman Encoder, Inverse Adder/Buffer for adding the low frequency coefficient to the high frequency one in the inverse DWT operation, and Huffman Decoder. Also there existed the interface blocks for communicating with the external application environments and the timing blocks for buffering between the internal blocks The global operations of the designed H/W are the image compression and the reconstruction, and it is operated by the unit of a field synchronized with the A/D converter. The implemented H/W used the 69%(16980) LAB(Logic Array Block) and 9%(28352) ESB(Embedded System Block) in the APEX20KC EP20K600CB652-7 FPGA chip of ALTERA, and stably operated in the 70MHz clock frequency. So we verified the real time operation of 60 fields/sec(30 frames/sec).

• Journal of KIISE:Computing Practices and Letters
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• v.11 no.1
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• pp.36-49
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• 2005

Recently, many researchers have given high attention to the semantic web services based on the semantic web technology While existing web services use the XML-based web service description language, WSDL, semantic web services are utilizing web service description languages such as DAML-S in ontology languages. The researchers of semantic web services are generally focused on web service discovery, web service invocation, web service selection and composition, and web service execution monitoring. Especially, the semantic web service discovery as the basis to accomplish the ultimate semantic web service environment has some different properties from previous information discovery areas. Hence, it is necessary to develop the storage system and discovery mechanism appropriate to the semantic well description languages. Even though some related systems have been developed, they are not appropriate for the embedded system environment, such as intelligent robotics, in which there are some limitations on memory disk space, and computing power In this regard, we in the embedded system environment have developed the document management system which efficiently manages the web service documents described by DAML-S for the purpose of the semantic web service discovery, In addition, we address the distinguishing characteristics of the system developed in this paper, compared with the related researches.