• The KIPS Transactions:PartA
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• v.9A no.4
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• pp.405-412
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• 2002

The embedded system has less fast CPU and lower memory than PC(personal Computer) or Workstation system. Therefore embedded operating is system is designed to efficiently use the limited resource in the system. Virtual memory management or the embedded linux have a low efficiency when page fault is occurred to get a data from I/O device. Because a data is moving from the swap device to main memory. This paper suggests virtual memory compression algorithm for improving in virtual memory management and capacity of space. In this paper, we present a way to performance implement a virtual memory compression system that achieves significant improvement for the embedded system.

• Proceedings of the IEEK Conference
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• 2008.06a
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• pp.1119-1120
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• 2008

The efficiently power management is an important requirement traditionally in the mobile communication system which uses battery as their power source. Especially, it has been emphasized in the most recent devices, which has to provide high performance and various functions with an extended operating time. In this article, the adaptive power management technique for the core processor unit in embedded systems used widely for the mobile system thanks to its advantage on power consumption and physical size, is proposed.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2003.10a
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• pp.129-132
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• 2003

In this paper, which sees the Strong-ARM SA1110 it used the main CPU and RTP in VoIP system. It will be able to apply the information communication field it embodied. It used the Tynux_box2 with the hardware side and it composed a VOIP system. And it used the RTP which is a real-time protocol in software control portion. The development environment of the paper that used the Target board and a Linux PC for connection used the RS-232C, USB connection, Ethernet LAN. The VoIP the environment for a communication used the wave file in the substitution which changes analog signal with the digital signal. And For the communication of the both sides it used the socket. This paper explained the fact that against a general technique from the operation of VoIP system. Using the Embedded linux development board which explained an operational process of the RTP protocol.

• Journal of KIISE:Computer Systems and Theory
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• v.34 no.9
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• pp.459-466
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• 2007

TCP/IP processing imposes a heavy load on the host CPU when it is processed by the host CPU on a very high-speed network. Recently the TCP/IP Offload Engine (TOE), which processes TCP/IP on a network adapter instead of the host CPU, has become an attractive solution to reduce the load in the host CPU. There have been two approaches to implement TOE. One is the software TOE in which TCP/IP is processed by an embedded processor and the other is the hardware TOE in which TCP/IP is processed by a dedicated ASIC. The software TOE has poor performance and the hardware TOE is neither flexible nor expandable enough to add new features. In this paper we designed and implemented a hybrid TOE architecture, in which TCP/IP is processed by cooperation of hardware and software, based on an FPGA that has two embedded processor cores. The hybrid TOE can have high performance by processing time-critical operations such as making and processing data packets in hardware. The software based on the embedded Linux performs operations that are not time-critical such as connection establishment, flow control and congestions, thus the hybrid TOE can have enough flexibility and expandability. To improve the performance of the hybrid TOE, we developed a hardware-based transmission/reception accelerator that processes important operations such as creating data packets. In the experiments the hybrid TOE shows the minimum latency of about $19{\mu}s$. The CPU utilization of the hybrid TOE is below 6 % and the maximum bandwidth of the hybrid TOE is about 675 Mbps.

• Journal of Korea Multimedia Society
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• v.4 no.1
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• pp.82-90
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• 2001

Genetic Algorithm(GA) has known as a method of solving NP problem in various applications. Since a major drawback of the GA is that it needs a long computation time, the hardware implementation of Genetic Algorithm is focused on in recent studies. This paper proposes a new type of embedded one chip computer fort Hardware Implementation of Genetic Algorithm. The proposed embedded one chip computer consists of 16 Bit CPU care and hardware of genetic algorithm. In contrast to conventional hardware oriented GA which is dependent on main computer in the process of GA, the proposed embedded one chip computer is independent on main computer. Conventional hardware GA uses the fixed length of chromosome but the proposed embedded one chip computer uses the variable length of chromosome by employing the efficient 16 bit Pipeline Unit. Experimental results show that the proposed one chip computer is applicable to the design of evolvable hardware for Random NRZ bit synchronization circuit.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.10 no.11
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• pp.2062-2068
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• 2006

In his paper, embedded system implementation for IEEE802.l1p based OFDM-DSRC is presented. After the IEEE802.11p physical layer specification is introduced and BER performance of the modem is evaluated by simulation, implementation aspects of the system such as system architecture, design method and implementation results are addressed. Implemented embedded system for the OFDM-DSRC communication consists of FPGA, flash memory, ARM9 CPU Core, peripherals, etc. from the results, it is shown that the implemented system operates well according to IEEE802.11p specification. It is expected that implemented embedded system shall be used for wireless communication system such as ITS application by enhancing system optimizing.

• Journal of Broadcast Engineering
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• v.19 no.3
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• pp.316-328
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• 2014

In this paper, we parallelize the popular feature detection algorithms, i.e. SIFT and SURF, and its application to fast panoramic image generation on the latest embedded GPU. Parallelized algorithms are implemented using recently developed OpenCL as the embedded GPGPU software platform. We compare the implementation efficiency and speed performance of conventional OpenGL Shading Language and OpenCL. Experimental result shows that implementation on OpenCL has comparable performance with GLSL. Compared with the performance on the embedded CPU in the same application processor, the embedded GPU runs 3~4 times faster. As an example of using feature extraction, panorama image synthesis is performed on embedded GPU by applying image matching using detected features.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.43 no.11 s.353
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• pp.185-191
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• 2006

DSRC((Dedicated Short Range Communication) is dedicated short range communication for wireless communications between RSE(Road Side Equipment) and OBE(On-Board Unit) within vehicle moving high speed. In this paper, we implemented 5.8GHz DSRC modem according to Korea TTA(Telecommunication Technology Association) standard and investigated implementation results and design process for SoC(System on a Chip) embedding ARM CPU which control overall signal and process arithmetic work. The SoC is implemented by 0.11um design technology and 480pins EPBGA package. In the implemented SoC ($Jaguar^{TM}$), 5.8GHz DSRC PHY(Physical Layer) modem and MAC are designed and included. For CPU core ARM926EJ-S is embedded, and LCD controller, smart card controller, ethernet MAC, and memory controller are designed as main function.

• Journal of KIISE:Computer Systems and Theory
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• v.33 no.7
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• pp.413-420
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• 2006

The speed of present-day network technology exceeds a gigabit and is developing rapidly. When using TCP/IP in these high-speed networks, a high load is incurred in processing TCP/IP protocol in a host CPU. To solve this problem, research has been carried out into TCP/IP Offload Engine (TOE). The TOE processes TCP/IP on a network adapter instead of using a host CPU; this reduces the processing burden on the host CPU. In this paper, we developed two software-based TOEs. One is the TOE implementation using an embedded Linux. The other is the TOE implementation using Lightweight TCP/IP (lwIP). The TOE using an embedded Linux did not have the bandwidth more than 62Mbps. To overcome the poor performance of the TOE using an embedded Linux, we ported the lwIP to the embedded system and enhanced the lwIP for the high performance. We eliminated the memory copy overhead of the lwIP. We added a delayed ACK and a TCP Segmentation Offload (TSO) features to the lwIP and modified the default parameters of the lwIP for large data transfer. With the aid of these modifications, the TOE using the modified lwIP shows a bandwidth of 194 Mbps.

• The Journal of the Korea institute of electronic communication sciences
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• v.9 no.9
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• pp.991-998
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• 2014

Embedded System operates hardware installed like processor, memory device, various input/output devices and software to control them. This thesis presents MPU module and Base board which are efficient industrial control through design and manufacture as developing S5PV210 CPU of SAMSUNG used by ARM Cortex-A8 based on Android which is Open mobile platform is installed to embedded system. Data for temperature and humidity which are received by CAN communication module proved the suitability and validity for the embedded platform design as implementing application program employed the native App with Linux Kernel based on the Android OS and application of HTML5.