• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.06a
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• pp.77-78
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• 2006

We fabricated photonic crystals on GaAs and GaN substrates. After anodizing the aluminium thin film in electrochemical embient, the porous alumina was implemented to the mask for reactive ion beam etching process of GaAs wafer. And photonic crystals in GaN wafer were also fabricated using electron beam nano-lithography process. The coated PMMA thin film with 200 nm-thickness on GaN surface was patterned with triangular lattice and etched out the GaN surface by the inductively coupled plasma source. The fabricated GaAs and GaN photonic crystals provide the enhanced intensities of light emission for the wavelengths of 858 and 450 nm, respectively. We will present the detailed dimensions of photonic crystals from SEM and AFM measurements.

• Proceedings of the IEEK Conference
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• 2001.06b
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• pp.189-192
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• 2001

We have studied fabrication processes that form asymmetric $\Gamma$-gate with a 0.1${\mu}{\textrm}{m}$ gate length in MMIC's(Monolithic Microwave Integrated Circuits). Asymmetric $\Gamma$-gate was fabricated using mixture of PMMA and MCB. Thus pseudomorphic high electron mobility transistor (PHEMT's) with 0.1${\mu}{\textrm}{m}$ gate length was fabricated via several steps such as mesa isolation, metalization, recess, passivation. PHEMT's has the -1.75 V of pinch-off voltage (Vp), 63 mA of drain saturation current(Idss and 363.6 mS/mm of maximum transconductance (Gm) in DC characteristics and current gain cut-off frequency of 106 GHz and maximum frequency of oscillation of 160 GHz in RF characteristics.

• Journal of Electrical Engineering and Technology
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• v.3 no.2
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• pp.276-279
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• 2008

We report on the enhancement of cathode-luminescence in an $In_xGa_{1-x}N/In_yGa_{1-y}$ green light emitting diode structure using two-dimensional photonic crystals. The square lattice arrays of photonic crystals with diameter/periodicity of 200/500 nm were fabricated by electron beam lithography. Inductively coupled plasma dry etching was used to etch and define photonic crystals. Three samples with different etch depths, i.e., 170, 95, and 65 nm, were constructed. Field emission scanning electron microscope analysis shows that air holes of photonic crystal structure with inverted-cone shapes were fabricated after dry etching. Cathode-luminescence measurement indicated that up to 30-fold enhancement of cathode-luminescence intensity has been achieved.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.5 no.3
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• pp.197-203
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• 2004

New lithography techniques are employed for the patterning of arbitrary shapes in nanometer scale. When, in the photolithography, the electromagnetic waves such as UV and X-ray are incident on the mask patterned in nanometer scale, the diffraction effect is unavoidable and degrades images of the mask imprinted on wafer. Only a convex lens is well-known Fourier transformer. It is possible to make the mask Fourier-transformed with the convex lens, even though the size of pattern on the mask is very large compared to the wavelength of electromagnetic wave. If the mask, modified according to new technique described in this paper, was placed at the front of the lens and was illuminated with laser beam, the nanometer-size patterns are only formed on the plane called Fourier transform plane. The new method presented here is quite simple setup and comparable with present and next generation lithographies such as UV/EUV photolithograpy and electron projection lithography when compared in attainable minimum linewidth. In this paper, we showed our theoretical research work in the field of Fourier optics, . In the near future, we are going to verify this theoretical work by experiments.

• Journal of the Korean Institute of Telematics and Electronics
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• v.26 no.2
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• pp.112-117
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• 1989

This paper describes to the unit rectangle EB direct writing lithography method using SEM. This method has the constant exposure time to any rectangle pattern. In order to change the EB current according to various rectangle size for the constant exposure time, the supply current of condenser lens in controlled by BITMAP-IV CAD system. By this method, the resizing procedure of density pattern area is not needed to pattern data conversion, and the through-put ofr exposure is increased about 172 times compared with the unit scan exposure method.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2005.07a
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• pp.17-18
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• 2005

실리콘 기판 위에 100nm의 선폭을 갖는 선들이 일정한 간격을 가지고 연속적으로 배열되어 있는 구조를 형성시켜 보았다. PMMA가 코팅되어 있는 실리콘 기판위에 전자빔으로 패턴을 하였고, 건식에칭을 통해 구조물을 형성한 후 원자 현미경으로 관찰하였다. 이러한 나노구조물의 구현은 전자빔 패터닝시에 전자빔이 실리콘 기판에 충돌할 때 나타나는 backward scattering과 proximity 효과 등의 영향으로 인해 pitch의 크기가 작아질수록 구현하기가 쉽지 않았다. 화합물반도체 단일 나노선 소자를 제작하여 소자의 전기적 특성을 측정할 때, 나노선 표면에 있는 자연산화막은 금속전극과 나노선 사이의 전기전도특성을 저해하는 요소로 알려져 있다. 이러한 자연산화막을 제거하기 위해 나노선을 건식에칭해 보았고, 원자현미경을 통해 에칭에 따른 나노선의 모양변화를 관찰하였다.

• ETRI Journal
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• v.34 no.6
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• pp.950-953
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• 2012

Schottky barrier single electron transistors (SB-SETs) and Schottky barrier single hole transistors (SB-SHTs) are fabricated on a 20-nm thin silicon-on-insulator substrate incorporating e-beam lithography and a conventional CMOS process technique. Erbium- and platinum-silicide are used as the source and drain material for the SB-SET and SB-SHT, respectively. The manufactured SB-SET and SB-SHT show typical transistor behavior at room temperature with a high drive current of $550{\mu}A/{\mu}m$ and $-376{\mu}A/{\mu}m$, respectively. At 7 K, these devices show SET and SHT characteristics. For the SB-SHT case, the oscillation period is 0.22 V, and the estimated quantum dot size is 16.8 nm. The transconductance is $0.05{\mu}S$ and $1.2{\mu}S$ for the SB-SET and SB-SHT, respectively. In the SB-SET and SB-SHT, a high transconductance can be easily achieved as the silicided electrode eliminates a parasitic resistance. Moreover, the SB-SET and SB-SHT can be operated as a conventional field-effect transistor (FET) and SET/SHT depending on the bias conditions, which is very promising for SET/FET hybrid applications. This work is the first report on the successful operations of SET/SHT in Schottky barrier devices.

• Proceedings of the Korean Society for Technology of Plasticity Conference
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• 2003.10a
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• pp.367-370
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• 2003

In this study, application of SAM (self-assembled monolayer) to nano replication process as an anti-adhesion layer was presented to reduce the surface energy between the nano mold and the replicated polymeric nano patterns. The electron beam lithography was used for master nano patterns and the electorforming process was used to fabricate the nickel nano stamper. Alkanethiol SAM as an anti-adhesion layer was deposited on metallic nano stamper using solution deposition method. To analyze wettability and adhesion force of SAM, contact angle and LFM (Lateral Force Microscopy) were measured at the actual processing temperature and pressure for the case of nano compression molding and at the actual UV dose for the case of nano UV molding. It was found that the surface energy due to SAM deposition on the nickel nano stamper markedly decreased and the quality of SAM on the nickel stamper maintained under the actual molding environments.

• Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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• 1998.04a
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• pp.302-307
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• 1998

In the production of semiconductor wafer, optical and electron microscopes, ion-beam, laser device must maintain their alignments within a sub-micrometer. This equipment requires a vibration free environment to provide its proper function. Especially, lithography and inspection devices, which have sub-nanometer class high accuracy and resolution, have come to necessity for producing more improved giga and tera class semiconductor wafers. This high technology equipments require very strict environmental vibration standard, vibration criteria, in proportion to the accuracy of the manufacturing, inspecting devices. The vibration criteria of high sensitive equipment should be represented in the form of exactness and accuracy, because this is used as basic data for the design of building structure and structural dynamics of equipment. The study on the evaluation of the factors affecting the permissible vibration criteria is required to design the efficient isolation system of the semiconductor manufacturing of equipment. This paper deals with the properties of the effected factor for vibration criteria of high sensitive equipment.

• Transactions on Electrical and Electronic Materials
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• v.4 no.4
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• pp.26-29
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• 2003

To discover electrical properties of individual single wall nanotube(SWNT), a number of SWNT-based tubeFETs have been fabricated. The device consists of a single semiconducting SWNT on an insulating substrate, contacted at each end by metal electrodes. It presents high transconductances, and charge storage phenomenon, which is the operations of injecting electrons from the nanotube channel of a tubeFET into charge traps on the surface of the $SiO_2$ gate dielectric, thus shifting the threshold voltage. This phenomenon can be repeated many times, and maintained for the hundreds of seconds at room temperature. We will report this phenomenon as the memory effects of the SWNT, and attempt to use this property for the memory device.