• 한국전자파학회:학술대회논문집
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• 한국전자파학회 2002년도 종합학술발표회 논문집 Vol.12 No.1
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• pp.394-397
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• 2002

A design study of phase detectors for the 2.5 Gb/s CDR circuit using a standard 0.18-${\mu}{\textrm}{m}$ CMOS process has been performed. The targeted CDR is based on the phase-locked loop and thus it consists of a phase detector, a charge pump, a LPF, and a VCO. For high frequency operation of 2.5 Gb/s, phase detector and charge pump, which accurately compare phase errors to reduce clock jitter, are critical for designing a reliable CDR circuit. As a phase detector, the Hogge phase detector is selected but two transistors are added to improve the performance of the D-F/F. The charge pump was also designed to be placed indirectly input and output.

• Journal of Magnetics
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• 제20권4호
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• pp.400-404
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• 2015

Various kinds of winding arrangements can be used to enable fault current limiters (FCL) to tolerate higher forces without resulting in a substantial increase in construction and fabrication costs. In this paper, a distributed winding arrangement is investigated in terms of its effects on the short-circuit forces in a three-phase FCL. The force magnitudes of the AC supplied windings are calculated by employing a finite element-based model in the time stepping procedure. The leakage flux and radial and axial force magnitudes obtained from the simulation are compared to those obtained from a conventional winding arrangement. The comparison shows that the distributed winding arrangement significantly reduces the radial and, especially, the axial force magnitudes.

• International Journal of Precision Engineering and Manufacturing
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• 제7권2호
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• pp.46-51
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• 2006

In this study, the electromagnetic characteristic of a flat-type two-dimensional proportional solenoid were analyzed by the magnetic reluctance method. The magnetic equivalent circuit equation for the solenoid was derived by modeling the reluctance of air gaps and magnetic structural components such as pole core, armature and yoke. It was solved iteratively because of the nonlinear magnetization properties of iron parts. The solutions showed good agreement with experimental data. Based on the magnetic equivalent circuit equation, the influence of design parameters on force-to-armature displacement curves was mathematically derived and experimentally verified. In this way, dominant design parameters could be analytically determined.

• 한국전자파학회:학술대회논문집
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• 한국전자파학회 2003년도 종합학술발표회 논문집 Vol.13 No.1
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• pp.638-648
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• 2003

An active capacitance circuit is analyzed in depth and its application to active RF BPF with low noise figure is discussed. The characteristics of the active capacitance circuit made of FET[1] exhibits negative resistance and conventional capacitance, which is easily controlled. However, it is difficult to make the negative resistance adequate in the designated frequency range due to the lack of detailed analysis, which could make an active circuit unstable as the frequency is going higher or lower. In this paper, we analyzed the negative resistance characteristics of active capacitance circuits and also presented the method that the flatness of passband can be controlled. Finally we have designed a 4-stage active BPE, which results in bandwidth of 100 MHz, 0,04 dB insertion loss, 0.2 dB ripple, and noise figure of 2.4 dB at 1.75 GHz band.

• 한국전자파학회논문지
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• 제15권3호
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• pp.251-257
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• 2004

연안에서 선박의 안전한 항행과 관제를 위해 선박간 또는 선박과 관제소간의 항행정보를 교환할 수 있도록 하는 AIS(Automatic Identification System)는 운용 방식(Low setting, High setting)에 따라 서로 다른 송신 출력 크기를 가지며, 1 ms(Transmitter Setting Time)안에 각각의 최종 출력 크기 의 20% 이내로 도달하도록 하는 동작 성능을 요구한다. 본 논문에서는 이와 같은 AIS의 송신 출력 특성에 부합할 수 있도록 전력 증폭기 모듈에 적절한 궤환 회로를 제안하고 이를 설계, 제작하였다.

• 한국전자파학회논문지
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• 제14권12호
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• pp.1276-1282
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• 2003

SMT 타입의 페라이트 비드(ferrite bead)는 전원단에서 발생되는 잡음(noise)이 회로 소자로 유입되는 것을 막기 위해 사용되는 소자로 병렬 캐패시터(capacitor)와 직렬 인덕터(inductor) 및 저항(resistor)을 이용하여 등가 모델화된다. 이와 같은 간단한 페라이트 비드의 등가 모델은 광대역 범위에서 측정 결과와 일치하지 않는다. 본 논문에서는 광대 역(50 MHz∼3 GHz)에서 정확한 페라이트 비드의 모델을 제시하고 페라이트 비드가 있을 때와 없을 때 전원단 잡음의 회로 소자에 미치는 영향을 고찰하였다.

• Journal of electromagnetic engineering and science
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• 제7권2호
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• pp.96-101
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• 2007

A design of circular polarized(CP) microstrip antenna with a fenced ground is proposed and the equivalent circuit is derived. The antenna consists of a square radiating patch with a pair of truncated comers, a bottom ground and a fenced ground. From conducted experiments, a patch size reduction using the metal fence as large as 25% from the conventional patch structure, has been obtained. The input admittance of the extracted equivalent circuit is shown to agree with that of the measurement. And the design parameters and performance of the proposed antenna are examined by analyzing the fields and circuit behaviors.

• 정보저장시스템학회논문집
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• 제6권1호
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• pp.6-11
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• 2010

Researches for actuator which is appropriate to slim optical disk drive (ODD) have been progressed for a long time. Various types of actuators are suggested to secure high performances with slim thickness. In this paper, the slim actuator with symmetric electromagnetic (EM) circuit is suggested to apply slim ODD. Various EM circuits are proposed to increase EM force in the focusing and the tracking directions. Flexible mode frequencies and driving sensitivities are increased by using stress distribution and design of experiment (DOE). Consequently, final model is suggested to have high flexible mode frequencies and driving sensitivities.

• Journal of electromagnetic engineering and science
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• 제10권4호
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• pp.237-243
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• 2010

A wireless power transfer system based on magnetically coupled two resonators is analysed using the filter theory. Design equations for each lumped parameter circuit components are derived. As a result, change of coupling coefficient between the resonators and/or change of load resistance are easily responded. Effect of circuit loss to the design theory is also addressed. After designing a power transfer system, a real system is constructed using spiral and loop coils. Dependence of circuit elements on their dimensions is measured in advance and used to cope with the designed element values. Simulated response by use of designed element values and measured result are compared, indicating the validity of the theory.

• Journal of electromagnetic engineering and science
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• 제14권4호
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• pp.342-345
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• 2014

An active frequency doubler monolithic microwave integrated circuit (MMIC) for E-band transceiver applications is presented in this letter. This MMIC has been fabricated in a commercial $0.1-{\mu}m$ GaAs pseudomorphic high electron mobility transistor (pHEMT) process on a 2-mil thick substrate wafer. The fabricated MMIC chip has been measured to have a high output power performance of over 13 dBm with a high fundamental leakage suppression of more than 38 dBc in the frequency range of 71 to 86 GHz under an input signal condition of 10 dBm. A microstrip coupled line is used at the output circuit of the doubler section to implement impedance matching and simultaneously enhance the fundamental leakage suppression. The fabricated chip is has a size of $2.5mm{\times}1.2mm$.