• 제목/요약/키워드: Effective hardware design

검색결과 207건 처리시간 0.025초

Design and Implementation of a Reverse Matrix Converter for Permanent Magnet Synchronous Motor Drives

  • Lee, Eunsil;Lee, Kyo-Beum
    • Journal of Electrical Engineering and Technology
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    • 제10권6호
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    • pp.2297-2306
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    • 2015
  • This paper presents the development of a system with a reverse matrix converter (RMC) for permanent magnet synchronous motor (PMSM) drive and its effective control method. The voltage transfer ratio of the general matrix converter is restricted to a maximum value of 0.866, which is not suitable for applications whose source voltages are lower than the load voltages. The proposed RMC topology can step up the voltage without any additional components in the conventional circuit. Its control method is different from traditional matrix converter’s one, thus this paper proposes control schemes of RMC by means of controlling both the generator and motor side currents with properly designed control loop. The converter can have sinusoidal input/output current waveforms in steady state condition as well as a boosted voltage. In this paper, a hardware system with an RMC for a PMSM drive system is described. The performance of the system was investigated through experiments

Simulated Annealing 의 효과적 변형 및 HLS 에의 적용 (Effective Variations of Simulated Annealing and Their Implementation for High Level Synthesis)

  • 윤복식;송낙운
    • 대한산업공학회지
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    • 제21권1호
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    • pp.33-49
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    • 1995
  • Simulated annealing(SA) has been admitted as a general purpose optimization technique which can be utilized for almost all kinds of combinatorial optimization problems without much difficulty. But there are still some weak points to be resolved, one of which is the slow speed of convergence. In this study, we carefully review various previous efforts to improve SA and propose some variations of SA which can enhance the speed of convergence to the optimum solution. Then, we apply the revised SA algorithms to the scheduling and hardware allocation problems occurring in high-level synthesis(HLS) of VLSI design. We confirm the efficiency of the proposed methods through several HLS examples.

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자동차 헤드라이트용 고압 방전등 안전기 시스템의 모델링 및 안정도 해석 (Modeling and Stability Analysis of Automotive HID Lamp Ballast)

  • 이인규;최성진;이규찬;조보형
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 1999년도 전력전자학술대회 논문집
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    • pp.411-414
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    • 1999
  • This paper presents design and analysis of an HID lamp ballast for a fast turn on characteristics and stable operation. It produces a high open circuit voltage for the ignition and it is controlled to supply effectively the power required to shorten the warm-up period after the breakdown. The lamp modeling by empirical data is presented. It is very effective in the designing of the control loop in the steady-state operating region. A stable operation of the lamp power regulation in the steady state is achieved, which is crucial for the long life time and constant light output. Stability analysis of the system is performed and the results are verified through various simulation results and the hardware experiments.

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채널의 출력제어를 통한 셀룰라 이동통신 시스템의 최적 설계 (Optimal design of mobile cellular communication systems by channel power control)

  • 옥창수;염봉진;이형수;김성준
    • 한국통신학회논문지
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    • 제21권12호
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    • pp.3154-3164
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    • 1996
  • A major concern in a cellular mobile communication system is how to efficiently utilize the limited amount of frequencies. Various channel assignment methods and traffic sharing schemes have been proposed to improve system performance. However, these approaches suffer from complicated software and hardware requirements due to increased amount of traffic control In this paper, we propose a new method for improving system performance by controlling the powers of the set-up and voice channels of each cell site. We first show that the average number of blocked calls in a system is minimized when the traffic reates are made identical for all cell sites in a system. This result, together with the relationship between the channel powers and the service area, is used to determine the appropriate channel powers of each cell site. We also determine the upper limit on the channel power of each cell site considering co-channel interference and numerically show that the proposed method is effective in reducing the number of blocked calls without an excessive increase in the amount of system control.

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고장시뮬레이션의 병렬화 알고리듬에 관한 연구 (Study on parallel algorithmfor falult simulation)

  • 송오영
    • 한국통신학회논문지
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    • 제21권11호
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    • pp.2966-2977
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    • 1996
  • As design of very large circuits is made possible by rapid development of VLSI technologies, efficient fault simulation is needed. Ingeneral, fault simulation requires many computer resources. As general-purpose multiprocessors become more common and affordable, these seem to be an attractive and effective alternative for fault simulation. Efficient fault simulation of synchronous sequential circuits has been reported to be attainably by using a linear iterative array model for such a circuit, and combining parallel fault simulation with russogate fault simulation. Such fault simulation algorithm is parallelized on a general-purpose multiprocessor with shard memory for acceleration of fault simulation. Through the experimenal study, the effect of the number of processors on speed-up of simulation, processor utilization, and the effect of multiprocessor hardware on simulation performance are studied. Some results for experiments with benchmark circuits are shown.

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WiSeMote: a novel high fidelity wireless sensor network for structural health monitoring

  • Hoover, Davis P.;Bilbao, Argenis;Rice, Jennifer A.
    • Smart Structures and Systems
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    • 제10권3호
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    • pp.271-298
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    • 2012
  • Researchers have made significant progress in recent years towards realizing effective structural health monitoring (SHM) utilizing wireless smart sensor networks (WSSNs). These efforts have focused on improving the performance and robustness of such networks to achieve high quality data acquisition and distributed, in-network processing. One of the primary challenges still facing the use of smart sensors for long-term monitoring deployments is their limited power resources. Periodically accessing the sensor nodes to change batteries is not feasible or economical in many deployment cases. While energy harvesting techniques show promise for prolonging unattended network life, low power design and operation are still critically important. This research presents the WiSeMote: a new, fully integrated ultra-low power wireless smart sensor node and a flexible base station, both designed for long-term SHM deployments. The power consumption of the sensor nodes and base station has been minimized through careful hardware selection and the implementation of power-aware network software, without sacrificing flexibility and functionality.

한국형 공격헬기 임무탑재장비 구조도 개념 연구 (Concept Study of Mission Equipment Package Architecture for Korean Attack Helicopter)

  • 김성우;김명진;오우섭;이종훈;임종봉
    • 한국군사과학기술학회지
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    • 제14권4호
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    • pp.598-606
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    • 2011
  • The importance of avionics systems has increased to a significant level in modern aircraft development. Modern avionics system is a complex integrated system of state-of-art hardware and software technology. Specifying the avionics system architecture is the most important task throughout the avionics system design process. This paper reviews modern avionics system architectures and proposes an effective avionics architecture suitable for modern attack helicopters.

PIC 컨트롤러를 이용한 KEYPAD 검사 시스템 개발 (Development of the Keypad Test System using PIC Controller)

  • 최광훈;권대규;전규철;이성철
    • 한국정밀공학회:학술대회논문집
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    • 한국정밀공학회 2002년도 추계학술대회 논문집
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    • pp.459-462
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    • 2002
  • This paper presents the development or a keypad test system for the improvement or the working environment and productivity improvement using the microprocessor PIC16F877 Chip. In order to detect the fault of keypad products, the design of hardware and software is performed in this system. All controls of the system is implemented by the 8 bit one chip micro-controller PIC. This keypad test system can also recognizes the work process, the work result and the fault position of the keypad which is made by the method of a flexible printed circuit (FPC) and construct the database about test results using personal computer. The experimental results show the effective performance of the keypad test system.

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스튜어트 플랫폼의 기구학적 교정기법에 관한 연구 (Study on Kinematic Calibration Method of Stewart Platforms)

  • 구상화;손권
    • 제어로봇시스템학회논문지
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    • 제7권2호
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    • pp.168-172
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    • 2001
  • The accuracy problem of robot manipulators has long been one of the principal concerns in robot design and control. A practical and economical way of enhancing the manipulator accuracy, without affecting its hardware, is kinematic calibration. In this paper an effective and practical method is presented for kinematic calibration of Stewart platforms. In our method differential errors in kinematical parameters are linearly related to differential errors in the platform pose, expressed through the forward kinematics. The algorithm is tested using simulated measurement in which measurement noise is included.

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기동표적의 상태추정을 이용한 포의 사격통제 시스템 향상 연구 (Gun fire Control System Design with Maneuvering Target State Estimates)

  • 이동관;송택렬;한두희
    • 대한전기학회논문지:시스템및제어부문D
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    • 제55권3호
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    • pp.98-109
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    • 2006
  • Fire control system(FCS) errors can be classified as hardware errors, filter prediction errors, effective ballistic function errors, and aiming errors. Among these errors, the filter prediction errors are the most significant error sources. To reduce them, a target future position calculation method using the acceleration estimate is suggested and it is compared with the constant velocity target prediction method. Simulation results show that the suggested method has better performance than the constant velocity prediction method. Target tracking algorithm is established with multiple target tracking filters based on IMM structure.