• Title/Summary/Keyword: EPLD

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Design of a Voting Mechanism considering Safety for NMR PPC Using EPLD and Reliability Analysis (EPLD를 이용한 안전성이 고려된 NMR PPC의 보팅메카니즘 설계와 신뢰도 분석)

  • Ryoo, Dong-Wan;Park, Heui-Youn;Koo, In-Soo;Seo, Bo-Hyeok
    • Proceedings of the KIEE Conference
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    • 2000.07d
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    • pp.2557-2560
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    • 2000
  • The protection system of the nuclear reactor and chemical reactor are representative of PPC(Plant Protection Controller). This PPC must be designed based on reliability as well as concept of safety, which is a failed system go a way of safe. PPC is consist of part of data acquisition, calculator, communication with redundancy, and a voter is important factor of reliability. Because it is serial connected. This paper presents a Design and Analysis of a Voting Mechanism considering Safety for NMR PPC Using EPLD. In the case of digital implementation a coincidence logic(voter) of PPC, it needs CPU and memory, so increase a number of units. Therefore the failure rate and cost is increased. On the contrary when it is designed EPLD or FPGA.

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Current Control of Switched Reluctance Motor with Delta Modulation Method on EPLD Logic Design (EPLD 로직구현을 통한 델타변조기법에 의한 스위치드 리럭턴스 전동기의 전류제어)

  • Yoon, Yong-Ho;Kim, Jae-Moon
    • The Transactions of the Korean Institute of Electrical Engineers P
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    • v.57 no.4
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    • pp.356-361
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    • 2008
  • The conventional drive system of SRM has a current sensor per each phase. The torque demand signal generated by the outer control loop is translated into individual current reference signal for each phase. The torque is controlled by regulating these currents. Using the SRM in a variable-speed control, the phase currents are generally regulated to achieve a square wave. The simplest form of current regulation uses fixed frequency delta modulation of the phase voltages. The aim of this paper is to regulate 3-phases current of SRM by only single current sensor using delta modulation with digital chip. In this paper, the asymmetric bridge converter which is able to control independently phases and be excited simultaneously is used as the driver system for 6/4 poles SRM. And the current sensor is replaced 3 sensors of each phase with only one on bus line of converter so as to detect current of every phase. The proposed delta modulation technique has been implemented in a simple digital logic circuit using EPLD(Electrically Programmable Logic Device). This method is verified through simulation and experiment results.

Design of an Electronic Ballast Protection Circuit for Electrodeless Fluorescent Lamps using EPLD (EPLD를 이용한 무전극 형광램프용 전자식 안정기의 보호회로 설계)

  • Kim, Hoon;Ma, Xian-Chao;Kim, Hee-Jun
    • Proceedings of the KIEE Conference
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    • 2007.10c
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    • pp.163-165
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    • 2007
  • 본 연구는 무전극 형광램프의 램프 이상 유무를 검출하여 램프에 이상이 발생한 경우 이를 검출하여 전자식 안정기 회로를 보호하는 방법을 제안하고 실험을 통해 검증한다. 제안된 보호회로는 램프 양단에 걸리는 전압을 검출하여 디지털 회로에서 이용할 수 있는 신호로 변환해주는 아날로그 회로부와 이 신호를 이용해 안정기 회로의 인버터 부에 공급되는 PWM 신호를 제거해 주는 디지털 회로부로 구성된다. 제안된 알고리즘은 개발 비교기 IC 소자와 EPLD를 이용해 간단한 회로로 제작되었으며, 차후 집적화에도 유리할 것으로 판단된다.

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Design of a Voting Mechanism considering Safety for Reliable System Using EPLD and Reliability Analysis

  • Ryoo, Dong-Wan;Lee, Hyung-Jik;Lee, Jeun-Woo
    • 제어로봇시스템학회:학술대회논문집
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    • 2001.10a
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    • pp.40.2-40
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    • 2001
  • The protection system of the system communication, nuclear reactor and chemical reactor are representative of reliable system. This reliable system must be designed based on reliability as well as concept of safety, which is a failed system go a way of safe. Reliable system is composed of part of data acquisition, calculator, communication with redundancy, and a voter is important factor of reliability. Because it is serially connected. This paper presents a Design and Analysis of a Voting Mechanism considering Safety for reliable system Using EPLD. In the case of digital implementation a coincidence logic (voter) of reliable system, it needs CPU and memory, so increase a number of units. Therefore the failure rate and cost are increased on contrary when it is designed EPLD or FPGA.

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EPLD based Induction Motor Drives with a New Three-Phase Randomized Pulse Position PWM Scheme (새로운 3상 랜덤 펄스 위치 PWM기법에 의한 EPLD기반의 모터 속도제어 시스템)

  • Kim Hoe-Geun;Wi Seog-Oh;Lim Young-Cheol;Jung Young-Gook;Na Seok-Hwan
    • Proceedings of the KIPE Conference
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    • 2002.07a
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    • pp.308-312
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    • 2002
  • In this paper, EPLD(Erasable Programmable Logic Device) based induction motor drives with a SRP-PWM(Separatley Randomized Pulse Position PWM) is proposed. In the proposed RPWM (Random PWM), each of three phase pulses is located randomly in each switching interval. Based on the space vector modulation technique, the duty ratio of the pulses is calculated. To verify the validity of the proposed RPWM, the experimental study was tried. Along with the randomization of PWM pulses, the space vector modulation is also executed in the TMS320C31 DSP(Digital Signal Processor). The experimental results show that the voltage and switching noise harmonics are spread to a wide band area. Also, the performance of the proposed SRP-PWM and the conventional SVM-PWM are nearly the same from the viewpoing of the v/f constant control.

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Hardware Implementation for Real-Time Speech Processing with Multiple Microphones

  • Seok, Cheong-Gyu;Choi, Jong-Suk;Kim, Mun-Sang;Park, Gwi-Tea
    • 제어로봇시스템학회:학술대회논문집
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    • 2005.06a
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    • pp.215-220
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    • 2005
  • Nowadays, various speech processing systems are being introduced in the fields of robotics. However, real-time processing and high performances are required to properly implement speech processing system for the autonomous robots. Achieving these goals requires advanced hardware techniques including intelligent software algorithms. For example, we need nonlinear amplifier boards which are able to adjust the compression radio (CR) via computer programming. And the necessity for noise reduction, double-buffering on EPLD (Erasable programmable logic device), simultaneous multi-channel AD conversion, distant sound localization will be explained in this paper. These ideas can be used to improve distant and omni-directional speech recognition. This speech processing system, based on embedded Linux system, is supposed to be mounted on the new home service robot, which is being developed at KIST (Korea Institute of Science and Technology)

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EPLD를 이용한 전파세기 측정기 Proto-type 제작

  • Gang, Yong-U;Je, Do-Heung;Wi, Seok-O;Han, Seok-Tae;Byeon, Do-Yeong;Kim, Gwang-Dong;Kim, Su-Yeon
    • The Bulletin of The Korean Astronomical Society
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    • v.36 no.1
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    • pp.72.1-72.1
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    • 2011
  • 한국우주전파관측망(Korean VLBI Network, KVN)을 이루는 21m 전파망원경 수신기들의 전파세기를 모니터링하기 위하여, 전파세기 측정기를 설계, 제작 중에 있다. 이 장치는 수신된 우주전파신호를 주파수로 변환해서, 전파관측 중의 모니터링이나 수신신호특성을 파악하는데 필요한 장치이다. 지난 연구(강용우 외, 2010)에서 이러한 회로 특성 파악과 개선을 위하여, 다양한 실험을 할 수 있게 전파세기 시험용 측정기를 제작하고 시험한 바 있다. 본 연구에서는 시험용 측정기의 시험 결과를 바탕으로, EPLD(Erasable Programmable Logic Devices)를 이용한 전파세기측정기를 새로 개발 중에 있다. 이에 지금까지의 개발 내용을 소개하고자 한다.

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The Development of PLD Design Tool using the EDIF Netlist (EDIF Netlist를 이용한 PLD 설계용 툴 개발)

  • Kim, Hi-Seok;Byun, Sang-Zoon
    • The Transactions of the Korea Information Processing Society
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    • v.5 no.4
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    • pp.1025-1032
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    • 1998
  • In this paper, the PLD design tool which realizes a digital circuit as PLD, by using EDIF netlist of the digital circuit designed at OrCAD have been developed. This paper is proposed the following algorithms: JIE(Joined Information Extractor) which extracts the connecting information between both cells in order to realize the digital circuit as PLD using the EDIF netlist, FND(Feedback Node Detector) which look into whether feedback exists or not, BEG(Boolean Equation Generator) which generates a boolean equation, and so on. Also, this paper is developed auto-select function which selects the PLD element with consideration of number of I/O variables of the minimized boolean equation, and algorithm generation JEDEC file of GAL6001 and GAL6002, having a forms of EPLD which is bigger than PLD.

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A Study on Improvement of Submarine Torpedo Acoustic Counter Measure Launcher System Safety Device Performance (잠수함용 어뢰기만기 발사체계 안전장치 작동성능 향상에 관한 연구)

  • Chang, Ho-Seong;Seo, Dae-Su;Lee, Gyeong-Chan;Lee, Jong-Gwan;Jo, Byeong-Gi;Kim, Joong-Bae
    • Journal of Korean Society for Quality Management
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    • v.46 no.3
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    • pp.411-424
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    • 2018
  • Purpose: The purpose of this study is to improve submarine TACM launcher system safety device performance. Methods: In this study, EPLD(Electrically Programmable Logic Device) control and time sharing method to the safety device actuator motor and discrete signal processor in launch control panel were used to resolve unusual performance of safety system. Results: The result of this study are as follows; First, sporadic stopping of safety device actuator motor due to insufficient In-Rush current was resolved. Second, repeat of safety device condition as lock & release due to chattering for motor activating was resolved. Third, simultaneous release function for safety device actuator was available. Conclusion: The unusual performance of function for submarine TACM launcher system was overcame by applying EPLD control and time sharing method. The suggestions were proved by performance test in the pressure chamber. The results of this study enhanced survivability of ${\bigcirc}{\bigcirc}{\bigcirc}$ class submarine from enemy torpedo.

A Time-Sharing TX/RX Control Technique for the Rejection of Feedback Noise Jamming Interference (피드백 잡음재밍 간섭제거를 위할 시분할 송수신 제어기법)

  • Jeong Un-Seob;Ra Sung-Woong
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.30 no.12C
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    • pp.1201-1207
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    • 2005
  • When the isolation between transmitter and receiver in Electronic Warfare equipment is not sufficient, the radiated noise jamming signal from the transmitter feeds back into the receiver and interferes with receiving radar pulse signal. Therefore pulse jamming and noise jamming can't be performed together in the same frequency bands. In this paper, we present a time-sharing TX/RX control technique of the switch matrix which inhibits the transmission of noise jamming signal by using the predicted gate of pulse train and also makes the corresponding channel filter operate to receive the radar pulse signal during the predicted gate pulse. This technique was implemented by EPLD and confirmed by experiment. The proposed technique enables the pulse jamming and the noise jamming to be simultaneously executed in multiple jamming environments.