• 천문학논총
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• 제6권1호
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• pp.62-75
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• 1991

The small sized telescope can be best used if the control and observation can be made remotely and fully automatically by the aid of computers. We discuss the possible ways of automating the existing telescopes of various designs using personal computers. 'We have specifically designed the parts necessary to automate 16 inch Cassegrain Telescope at Pusan University Observatory. The degree of automation we have set for the present work is the interactive. remote observation including opening and shutting down of dome slit. The observational modes we have in mind are photoelectric photometry and CCD imaging. The basic components of the hardware are interface card for 16 or 32 bit IBM PC family of computers, relay switches for the control of telescope movements, stepping motor controller card for the control of observational equipments, and AID converter unit that accepts signal from sensors for the environment conditions such as temperature, wind speeds, precipitation, etc. We also have designed and built a photoelectric photometer that can be fully controlled by the command of a computer. Such observational equipment is also essential in order that the remote observation can be realized.

• 조명전기설비학회논문지
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• 제26권8호
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• pp.1-7
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• 2012

In this paper, a new LED driving circuit which is able to control dimming of LED is proposed using charge pump. The proposed LED driving circuit steps down the input voltage to operate LED without DC-DC converter. The operation of this driving circuit is verified by P-Spice simulation, and the characteristics of the driving circuit is measured and evaluated in the experiments. As a result, the driving circuit efficiency of 88.5[%] is obtained when all LEDs are turned on by digital control method at the highest dimming level(255/255).

• 한국정보통신학회논문지
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• 제5권7호
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• pp.1219-1225
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• 2001

본 논문에서는 BWLL 상향링크에 적용할 수 있는 버스트 QPSK 수신기의 동기알고리즘을 설계하였다. 본 논문에서 설계한 버스트 수신기는 디지털 다운컨버터와 정합필터 그리고 동기회로로 구성되어 있다. 동기회로의 경우 심벌 타이밍 복구를 위하여 가드너 알고리즘을 사용하였고 반송파 주파수 복구를 위하여 4승법을 사용하였으며 반송파 위상 복구는 DD알고리즘을 사용하였다. 성능 분석을 위하여 제안된 알고리즘에 대한 시뮬레이션 결과와 VHDL로 코딩되어 FPGA에 구현된 실제회로의 결과를 비교, 분석하였다. 성능분석 결과 주파수 옵셋이 심벌율의 4.7% 까지 동기기가 잘 동작하였다.

• 한국정보통신설비학회:학술대회논문집
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• 한국정보통신설비학회 2004년도 하계학술대회
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• pp.369-372
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• 2004

In this paper, a low noise amplifier (LNA) in receiver of Low Noise Block Down Converter (LNB) for direct broadcasting service (DBS) is implemented by using GaAs HEMT The LNA is designed for operation between 10.7GHz-12.7GHz. The LNA consists of input, output matching circuits, DC-blocks and RF-chokes. The result of simulation of the LNA shows that a noise figure is less than 1.4dB and a gain is gloater than 9.2dB in the bandwidth of 10.7 to 12.7GHz with good flatness of 0. ldB

• 한국정보통신학회:학술대회논문집
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• 한국해양정보통신학회 2000년도 춘계종합학술대회
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• pp.139-142
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• 2000

본 논문에서는 마이크로파 트랜시버용 자기발진믹서를 설계·제작하였다. 설계된 자기 발진기는 10.75GHz의 동작주파수에서 4.33dBm의 출력을 보였으며 위상잡음은 100KHz의 offset주파수에서 -102dBc/Hz의 특성을 보였다. 입사신호 11.7호z∼12.9GHz를 인가시켰을 때 If 주파수 950MHz∼2150MHz 범위에서 변화이득은 6dB로 나타났으며 설계된 SOM은 디지털 트랜시버 시스템의 하향변환기에 적용할 수 있음을 확인하였다.

• Journal of information and communication convergence engineering
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• 제10권2호
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• pp.194-199
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• 2012

This paper proposes a novel scheme of a gray scale fingerprint image for a high-accuracy capacitive sensor chip. The conventional grayscale image scheme uses a digital-to-analog converter (DAC) of a large-scale layout or charge-pump circuit with high power consumption and complexity by a global clock signal. A modified capacitive detection circuit for the charge sharing scheme is proposed, which uses a down literal circuit (DLC) with a floating-gate metal-oxide semiconductor transistor (FGMOS) based on a neuron model. The detection circuit is designed and simulated in a 3.3 V, 0.35 ${\mu}m$ standard CMOS process. Because the proposed circuit does not need a comparator and peripheral circuits, the pixel layout size can be reduced and the image resolution can be improved.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1999년도 하계학술대회 논문집 F
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• pp.2754-2757
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• 1999

This paper describes the development of the linear pulse motor (herea-fter, LPM) and the driver system to control the quantity of fuel in the nuclear furnace. The LPM developed in this study is a kind of the linear motor with the properties of moving up and down, and both the stator and the mover of the LPM are designed as the salient type. Especially, the stator has windings but there is no windings or magnet on the mover. To Maximize the characteristics of the LPM, we chose the asymmetric bridge converter as the driving system for LPM.

• 전기학회논문지
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• 제64권2호
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• pp.342-348
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• 2015

In this paper, fuel cell power generation system that is being studied in recent railway field was applied to compensate for the voltage drop due to the load as driving electric vehicle. PSIM simulation program is to be used to implement the modeling of the electric railway for AC AT feeder system. For it, It was applied to the product-type single-phase PLL algorithm, step-down converter is controlled as power so as to have the fuelcell generation system. Based on it's result, a reactive power due to the catenary impedance in accordance with the current flowing is compensated as linked with fuelcell generation system which supplied the current to the power supply grid. and then its performance was confirmed that voltage compensation effect obtained at SubStation (SS), SubSectioning Post (SSP), Sectioning Post (SP).

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2008년도 하계종합학술대회
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• pp.499-500
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• 2008

In this paper, we design and implement the monolithic power factor correction IC for system power modules using a high voltage(50V) CMOS process. The power factor correction IC is designed for power applications, such as refrigerator, air-conditioner, etc. It includes low voltage logic, 5V regulator, analog control circuit, high-voltage high current output drivers, and several protection circuits. And also, the designed IC has standby detection function which detects the output power of the converter stage and generates system down signal when load device is under the standby condition. The simulation and experimental results show that the designed IC acts properly as power factor correction IC with efficient protective functions.

• 한국전자파학회:학술대회논문집
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• 한국전자파학회 2002년도 종합학술발표회 논문집 Vol.12 No.1
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• pp.209-212
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• 2002

본 논문에서는 위성방송 수신용 광대역 저잡음 증폭기를 설계 및 구현하였다. 전산모의 실험용 소프트웨어를 사용하여 저잡음 증폭기를 설계하였고, 제작된 저잡음 증폭기의 전기적 특성을 네트워크 분석기와 Noise Figure 분석기를 사용하여 측정하였다. LNA단의 Noise Figure에 중점을 두고 샘플을 제작하여 측정한 길과 전산모의실험에서 나온 데이터는 0.46㏈이하였고 전체 시스템에서 측정된 Noise figure는 0.6㏈정도의 좋은 길과를 나타내었지만, 반면에 이득과 반사손실의 결과가 약간 떨어짐을 보였다 위성 인터넷 등 위성을 이용하는 통신 인구의 급격한 증가와 더불어 구현된 저잡음 증폭기를 사용한 LNB(Low Noise Block down converter)가 널리 응용될 것으로 기대된다.