• Proceedings of the KIEE Conference
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• 2001.07b
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• pp.1052-1054
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• 2001

This paper describes a boost converter to be operated at the boundary of continuous current mode(CCM) and discontinuous current mode(DCM) for power factor correction and low cost. A control method to be utilized in simulation is a average-current mode method in case of operating in CCM. The simulation results show that Better is the CCM converter then the DCM converter in harmonic content and input current waveform. And A Double-boost converter is superior to single-boost converter for input-current harmonic.

• Proceedings of the KIEE Conference
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• 2004.07e
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• pp.14-16
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• 2004

This paper describes a boost converter to be operated at the boundary of continuous current mode(CCM) and discontinuous current mode(DCM) for power factor correction and low cost. A control method to be utilized in simulation is a average Current mode method in case of operating in CCM. The simulation results show that Better is the CCM converter then the DCM converter in harmonic content and input current waveform. And A Double-boost converter is superior to single-boost converter for input-current harmonic.

• Journal of the Korean Institute of Telematics and Electronics
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• v.27 no.6
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• pp.963-971
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• 1990

This paper proposes a memory intensive VLSI architecture for the realization of real-time 3x3 neighborhood processor based on the distributed arithmetic. The proposed architecture is characterized by a bit serial and multi-kernel parallel processing which exploits the pixel kernel parallelism and concurrency. The chip implements 8 neighborhood processing elements in parallel with efficirnt input and output modules which operate concurrently. Besides the a4chitectural design of a neighborhood processor, the design methodology using module generator concept has been considered and MOGOT(MOdule Generator Oriented VLSI design Tool) has been constructed based on the workstation. Based on these design environments MOGOT, it has been shown that the main part of the suggested architecture can be designed efficiently using 2\ulcorner double metal CMOS technology. It includes design of input delay and data conversion module, look-up table for inner product operation, carry save accumulator, output data converter and delay module, and control module.

• Proceedings of the KWS Conference
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• 2005.06a
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• pp.282-284
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• 2005

The line heating methods is very widely employed to correct deformation of thin plate structures. In this study, evaluation was carried out on the temperature distribution of line heating methods using FEA and practical experiments. In FEA, heat input model was established using Tsuji's double Gaussian heat input mode. This model was verified by comparing with experimental data. Thermo elasto-plastic analysis was performed using commercial FE code, MSC/MARC. Transverse shrinkage and angular distortion were measured using 3D measuring apparatus. Based on these results, a simplified analysis method is applied by using equivalent loading method.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.33 no.4C
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• pp.330-335
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• 2008

This paper proposes a packet detection algorithm for IEEE802.11n system. IEEE802.11n is a multiple input multiple output (MIMO) system and we have to consider several combining techniques which are used in multiple receive antenna system. In this paper, we propose a hybrid packet detection algorithm which combines double sliding window algorithm or delay and correlation algorithm, that is used in single input single output (SISO) system, and multiple receive antenna combining algorithms, and simulated their performances in Iin system environments and shows the results.

• Journal of Information Processing Systems
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• v.17 no.2
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• pp.399-410
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• 2021

Aiming at the problem that complex external variables in natural scenes have a greater impact on facial expression recognition results, a facial expression recognition method based on two-stream convolutional neural network is proposed. The model introduces exponentially enhanced shared input weights before each level of convolution input, and uses soft attention mechanism modules on the space-time features of the combination of static and dynamic streams. This enables the network to autonomously find areas that are more relevant to the expression category and pay more attention to these areas. Through these means, the information of irrelevant interference areas is suppressed. In order to solve the problem of poor local robustness caused by lighting and expression changes, this paper also performs lighting preprocessing with the lighting preprocessing chain algorithm to eliminate most of the lighting effects. Experimental results on AFEW6.0 and Multi-PIE datasets show that the recognition rates of this method are 95.05% and 61.40%, respectively, which are better than other comparison methods.

• Transactions of Materials Processing
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• v.32 no.6
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• pp.376-383
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• 2023

The torsion bar, which is a steering torque sensor, is mounted between the steering pinion and the input shaft in the IPA(input pinion assembly). Accurate torque measurement is important to improve the sense of operation, and the straightness of the torsion bar can affect torque measurement. In this study, the amount of bending was measured and the exact shape was analyzed regarding the bending phenomenon in the press-fitting process for torsion bars. The effect of alignment error was analyzed through finite element forming analysis. Process data analysis was conducted for the double-end press fit model. If there is an alignment error of about 10% of the serration tooth height, the indentation load is reduced by about 10%. If there is an alignment error, the torsion bar is rotated.

• Proceedings of the IEEK Conference
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• 1998.10a
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• pp.1025-1028
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• 1998

Hardware to implement the parallelized Floating-point rounding algorithm is described. For parallelized additions, we propose an addition module which has carry selection logic to generate two results accoring to the input valuse. A multiplication module for parallelized multiplications is also proposed to generate Sum and Carry bits as intermediate results. Since these modules process data in IEEE standard Floatingpoint double precision format, they are designed for 53-bit significands including hidden bits. Multiplication module is designed with a Booth multiplier and an array multiplier.

• Proceedings of the Acoustical Society of Korea Conference
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• 1998.06c
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• pp.189-192
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• 1998

전화망을 이용한 음성인식 시스팀에서 출력신호의 반향에 의한 입력신호의 음질 열화현상을 막기위해서 적응디지털 필터를 이용한 반향제거기가 필수적이다. 대표적인 적응 필터 알고리즘인 LMS와 NLMS 들을 각각 이용한 적응 반향제거기들과 입/출력신호의 상관계수를 이용한 개선된 적응 필터 알고리즘의 성능을 비교하였다. 개선된 알고리즘의 경우 NLMS 알고리즘의 빠른 수렴특성을 가지면서도 더블톡(double talk)구간에서의 음질왜곡 현상을 LMS보다 개선시켰다.

• Proceedings of the IEEK Conference
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• 1999.06a
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• pp.247-250
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• 1999

This paper presents characteristics of neuron-MOSFET for the implementation of logic circuits such at the inverter and D/A converter. Neuron-MOSFETS were fabricated using double poly CMOS process. From the measured results, it was found that noise margin of the inverter was dependant on the coupling ratio and a complete D/A characteristics of the source follower could be obtained by using any input Sate as a control gate.