• International Journal of Computer Science & Network Security
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• v.24 no.4
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• pp.192-196
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• 2024

The memory coherence problem occurs while mapping shared virtual memory in a loosely coupled multiprocessors setup. Memory is considered coherent if a read operation provides same data written in the last write operation. The problem is addressed in the literature using different algorithms. The big question is on the correctness of such a distributed algorithm. Formal verification is the principal term for a group of techniques that routinely use an analysis that is established on mathematical transformations to conclude the rightness of hardware or software behavior in divergence to dynamic verification techniques. This paper uses UPPAAL model checker to model the dynamic distributed algorithm for shared virtual memory given by K.Li and P.Hudak. We analyse the mechanism to keep the coherence of memory in every read and write operation by using a dynamic distributed algorithm. Our results show that the dynamic distributed algorithm for shared virtual memory partially fulfils its functional requirements.

• The KIPS Transactions:PartA
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• v.14A no.4
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• pp.215-226
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• 2007

For past years, many distributed virtual shared-memory(DVSM) systems have been studied in order to develop a low-cost shared memory system with a fast interconnection network. But the DVSM needs a lot of data and control communication between distributed processing nodes in order to provide memory consistency in software, and this communication overhead significantly dominates the overall performance. In general, the communication overhead also increases as the number of processing nodes increase, so communication overhead is a very important performance factor for developing a large-scale DVSM system. In this paper, we study the performance scalability quantitatively and qualitatively for developing a large-scale DVSM system based on the next generation interconnection network, called the InfiniBand. Based on the study, we analyze a performance requirement of the next-coming interconnection network to be used for developing a performance-scalable DVSM system in the future.

• Journal of KIISE:Computer Systems and Theory
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• v.29 no.5
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• pp.257-264
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• 2002

In this paper, we give a detailed description of KDSM(KAIST Distributed Shared Memory) system. KDSM is implemented as a user-level library running on Linux 2.2.13, and TCP/IP is used for communication. KDSM uses page-based invalidation protocol, multiple-writer protocol, and supports HLRC(Home-based Lazy Release Consistency) memory consistency model. To evaluate performance of KDSM, we executed 4 scientific applications and compared the result to JLAJLA. The results showed that performance of KDSM almost equal to JIAJIA for 2 applications and performance of KDSM is better than JIAJIA for 2 applications.

• Journal of KIISE:Computer Systems and Theory
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• v.30 no.7_8
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• pp.331-340
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• 2003

Low-cost commodity SMP(Symmetric Multiprocessor) is widely used as a node of cluster system. In this paper, we implement and evaluate the performance of SDSM system for SMP clusters. Our SDSM system provides HLRC(Home-based Lazy Release Consistency) memory consistency model. Our protocol utilize shared memory within same SMP node, so that page fetch and message passing through network can be reduced. It is implemented on 8 node of 2-way Pentium-III SMP interconnected with 100Mbps Fast Ethernet, and uses TCP/IP for transport/network layer protocol. The experiment with eight applications shows that our SMP protocol achieves maximum 33% speedup improvement and 13%-52% reduction of page fetch compared with uniprocessor protocol.

• Journal of KIISE:Computer Systems and Theory
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• v.28 no.9
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• pp.461-468
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• 2001

Though shared virtual memory (SVM) system promise low cost solutions for high performance computing they suffer from long memory latencies. These latencies are usually caused by repetitive invalidations on shared data. Since shared data are accessed through synchronization and the patterns by which threads synchronizes are repetitive, a prefetching scheme bases on such repetitiveness would reduce memory latencies. Based on this observation, we propose a prefetching technique which predicts future access behavior by analyzing access history per synchronization variable. Our technique was evaluated on an 8-node SVM system using the SPLASH-2 benchmark. The results show the our technique could achieve 34%~45% reduction in memory access latencies.

• Proceedings of the Korean Information Science Society Conference
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• 2002.04a
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• pp.616-618
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• 2002

최근에는 고성능 네트웍으로 구성된 클러스터 상에서 사용자 수준 통신을 사용하는 소프트웨어 분산 공유메모리 시스템의 연구가 활발히 진행되고 있다. 본 논문에서는 사용자수준 프로토콜의 표준인 Virtual Interface Architecture(VIA)를 사용하고 확장성 있는 Home-based Lazy release Consistency(HLRC) 모델을 기반으로 하는 소프트웨어 분산공유메모리 시스템을 구현한다. 본 시스템은 VIA의 원격 메모리 쓰기 기능을 최대한 활용하며, 통신 과정에서 통신 버퍼와 사용자 메모리 사이의 복사가 일어나지 않도록 설계되어 높은 성능을 보인다.

• The Transactions of the Korea Information Processing Society
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• v.3 no.1
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• pp.107-117
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• 1996

This paper proposes a conceptual model for distributed problem solving(DPS), where cooperation and communication among agents are based on virtual shared memory (VSM) In this model, all agents in a DPS system view all the memory in a distributed computer system as a single shared memory in which data, tasks, and results can in a distributed computer system as a single shared memory, in which data, tasks, and results can / be accessed by any of the agents. Several agents cooperatively solve a complex problem, as agents write data, intermediate results of execution, and tasks requested to other agents to VSM and other agents read or execute them. Also, in order to develop DPS systems based on the proposed conceptual model, this paper designs a DPS system development environment(DPS-VSM)using Network Linda. Thi spaper shows utility ofthe proposed model by presenting an example of simulation a VSM-based DPS system, and analyzes the model by comparing the features of DPS- VSM with some other DAI programming shells.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.25 no.5B
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• pp.899-912
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• 2000

PVM provides users with a single image of high performance parallel computing machine by collecting machines distributed over a network. Low communication overhead is essential to effectively run applications on PVM based platforms. In the original PVM, three times of memory copies are required for a PVM task to send a message to a remote task, which results in performance degradation. We propose a zero-copy model using global shared memory that can be accessed by PVM tasks, PVM daemon, and network interface card(NIC). In the scheme, a task packs data into global shared memory, and notify daemon that the data is ready to be sent, then daemon routes the data to a remote task to which it is sent with no virtual data copy overhead. Experimental result reveals that the message round trip time between two machines is reduced significantly in the proposed zero-copy scheme.

• Journal of Institute of Control, Robotics and Systems
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• v.5 no.1
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• pp.115-121
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• 1999

Advanced digital computer technology enables the computer-based controllers to replace the traditional analog controllers used in factory automations. This replacement, however, brings up the side effects caused by the quantization error and non-real-time execution of control software. This paper describes the structure of real-time simulator and controller that can be used for design and verification of real-time digital controllers. The virtual machine concept adopted by the proposed real-time simulator makes the proposed simulator be independent from the specific hardware platforms. The proposed system can also be used in the loosely coupled distributed environments connected through local area network using real-time message passing algorithm and virtual data table based on the shared memory mechanism.

• 제어로봇시스템학회:학술대회논문집
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• 1997.10a
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• pp.744-747
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• 1997

High performance digital computer technology enables the digital computer-based controllers to replace traditional analog controllers used for factory automations. This replacement, however, brings up the side effects caused by discrete quantization and non-real-time execution of control softwares. This paper describes the structure of real-time simulator and controller that can be used for design and verification of real-time digital controllers. The virtual machine concept adopted by real-time simulator make the proposed simulator be independent from the specific hardware platforms. The proposed system can also be used in the loosely coupled distributed environments connected through local area network using real-time message passing algorithm and virtual data table based on the shared memory mechanism.