• Journal of Power Electronics
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• v.13 no.3
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• pp.487-496
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• 2013

The three-phase synchronous reference frame phase-locked loop (SRF-PLL) is widely used for synchronization applications in power systems. In this paper, a new control strategy for three-phase grid-connected LCL inverters without a PLL is presented. According to the new strategy, a current reference can be generated by using the instantaneous power control scheme and the proposed positive-sequence voltage detector. Through theoretical analysis, it is indicated that a high-quality grid current can be produced by introducing the new control strategy. In addition, a kind of independent control for reactive power can be achieved under unbalanced and distorted grid conditions. Finally, the excellent performance of the proposed control strategy is validated by means of simulation and experimental results.

• Journal of Power Electronics
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• v.17 no.2
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• pp.464-475
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• 2017

This study examines a P+multi resonant-based voltage control for voltage harmonics compensation under the islanded mode of a microgrid. In islanded mode, the inverter is defined as a voltage source to supply the full local load demand without the connection to the grid. On the other hand, the output voltage waveform is distorted by the negative and zero sequence components and current harmonics due to the unbalanced and nonlinear loads. In this paper, the P+multi resonant controller is used to compensate for the voltage harmonics. The gain tuning method is assessed by the tendency analysis of the controller as the variation of gain. In addition, this study analyzes the slight voltage magnitude drop due to the practical form of the P+multi resonant and proposes a counter method to solve this problem by adding the PI-based voltage restoration method. The proposed P+multi resonant controller to compensate for the voltage harmonics is verified through the PSIM simulation and experimental results.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.67 no.11
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• pp.1447-1454
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• 2018

In this paper, the design of robust DSC-PLL(Delayed Signal Cancellation Phase Locked Loop) is proposed for coping with frequency variation. This method shows significant performance for detection of fundamental positive sequence component voltage when the grid voltage is polluted by grid unbalance and frequency variation. The feedback frequency estimation of DSC-PLL is tracking the drift in the phase by unbalance and frequency variation. The robust DSC PLL is to present the analysis on method and performance under frequency variations. These compensation algorithms can correct for discrepancies of changing the frequency within maximum 193[ms] and improve traditional DSC-PLL. Linear interpolation method is adopted to reduce the discretized errors in the digital implementation of the PLL. For verification of robust characteristic, PLL methods are implemented on FPGA with a discrete fixed point based. The proposed method is validated by both Matlab/Simulink and experimental results based on FPGA(XC7Z030).

• Proceedings of the KIPE Conference
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• 2018.07a
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• pp.144-146
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• 2018

In order to meet the harmonics standards such as IEEE 519 and P1547 the output quality of a grid connected inverter should satisfy a certain level of Total Harmonic Distortion (THD) value. However, the output quality of an inverter gets degraded due to the grid voltage harmonics, the dead time effects and the nonlinearity of the switches, which all contributes to a higher THD value of the output. In order to meet the required THD value for the inverter output under the distorted grid condition the use of harmonic controller is essential. In this paper a novel feedforward harmonic compensation method is proposed in order to effectively eliminate the low order harmonics in the inverter current to the grid. In the proposed method, unlike the conventional harmonic control methods, the hamonic components are directly compensated by the feedforward terms generated by the PR controller with the grid current in the stationary frame. The proposed method is simple in implementation but powerful in eliminating the harmonics from the output. The effectiveness of proposed method is verified through the PSIM simulation and the experiments with a 5kW single phase grid connected inverter.

• Journal of Electrical Engineering and Technology
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• v.12 no.3
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• pp.1101-1107
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• 2017

In this paper, a robust and fast grid synchronization method of a three-phase power converter is proposed. The amplitude and phase information of grid voltages are essential for power converters to be properly connected into the utility. The phase-lock-loop in synchronous reference frame has been widely adopted for the three-phase converter system since it shows a satisfactory performance under balanced grid voltages. However, power converters often operate under abnormal grid conditions, i.e. unbalanced by grid faults and frequency variations, and thus a proper active and reactive power control cannot be guaranteed. The proposed method adopts a second order generalized integrator in synchronous reference frame to detect positive sequence components under unbalanced grid voltages. The proposed method has a fast and robust performance due to its higher gain and frequency adaptive capability. Simulation and experimental results show the verification of the proposed synchronization algorithm and the effectiveness to detect positive sequence voltage.

• The Transactions of the Korean Institute of Power Electronics
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• v.24 no.3
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• pp.215-227
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• 2019

Grid-connected inverters should satisfy a certain level of total harmonic distortion (THD) to meet harmonics standards, such as IEEE 519 and P1547. The output quality of an inverter is typically degraded due to grid voltage harmonics, dead time effects, and the device's turn-on/turn-off delay, which all contribute to increasing the THD value of the output. The use of a harmonic controller is essential to meet the required THD value for inverter output under a distorted grid condition. In this study, an improved feedforward harmonic compensation method is proposed to effectively eliminate low-order harmonics in the inverter current to the grid. In the proposed method, harmonic components are directly compensated through feedforward terms generated by the proportional resonant controller with the grid current in a stationary frame. The proposed method is simple to implement but powerful in eliminating harmonics from the output. The effectiveness of the proposed method is verified through simulation using PSIM software and experiments with a 5 kW single-phase grid-connected inverter.

• Journal of Power Electronics
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• v.18 no.6
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• pp.1855-1865
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• 2018

This paper presents a control strategy for voltage-controlled multi-function distributed generation (DG) combined with an active power filter (APF) and a reactive power compensator. The control strategy is based on droop control. As a result of local nonlinear loads, the voltages of the point of common coupling (PCC) and the currents injecting into the grid by the DG are distorted. The power quality of the PCC voltage can be enhanced by using PCC harmonic compensation. In addition, with the PCC harmonic compensation, the DG offers a low-impedance path for harmonic currents. Therefore, the DG absorbs most of the harmonic currents generated by local loads, and the total harmonic distortion (THD) of the grid connected current is dramatically reduced. Furthermore, by regulating the reactive power of the DG, the magnitude of the PCC voltage can be maintained at its nominal value. The performance of the DG with the proposed control strategy is analyzed by bode diagrams. Finally, simulation and experimental results verify the proposed control strategy.

• Journal of Electrical Engineering and Technology
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• v.8 no.3
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• pp.507-515
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• 2013

This paper proposes a compensation method for the $2^{nd}$-order harmonic of single-phase grid-connected wind power generation systems. Theoretically, a single-phase grid-connected inverter system has no choice but to cause the $2^{nd}$-order harmonic to DC-link voltage. The reference active current is affected by the DC-link voltage. The output current from the reference active current is distorted by the $1^{st}$ and $3^{rd}$-order harmonic. The proposed method can compensate, conveniently, the reference active current with the $2^{nd}$-order harmonic. To reduce the $2^{nd}$-order ripple in the reference active current, proposed method takes a PR controller as a feed-forward compensator. PR controllers can implement selective harmonic compensation without excessive computational requirements; the use of these controllers simplifies the method. Both the simulation and experimental results agree well with the theoretical analysis.

• The Transactions of the Korean Institute of Power Electronics
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• v.22 no.4
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• pp.369-372
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• 2017

This paper presents a control scheme for three-level NPC inverters using small DC-link capacitors. To reduce the inverter system volume, the film capacitor with small capacitance is a promising candidate for the DC-link. When small capacitors are applied in a three level inverter, however, the AC ripple component increases in the DC-link NPV (neutral point voltage). In addition, the three-phase input grid currents are distorted when the DC-link capacitors are fed by diode rectifier. In this paper, the additional circuit is applied to compensate for small capacitor systems defect, and the offset voltage injection method is presented for the stabilization in NPV. These two proposed processes evidently ensure the quality improvement of the input grid currents and output load currents. The feasibility of the proposed method is verified by experimental results.

• Journal of Electrical Engineering and Technology
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• v.6 no.5
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• pp.658-665
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• 2011

In the present paper, a novel fast peak detector for single- or three-phase unsymmetrical voltage sags is proposed. The proposed detector is modified from a single-phase digital phase-locked loop based on a d-q transformation using an all-pass filter (APF). APF generates a virtual phase with $90^{\circ}$ phase delay. However, this virtual phase cannot reflect a sudden change of the grid voltage in the moment of voltage sag, which causes a peak value to be significantly distorted and to settle down slowly. Specifically, the settling time of the peak value is too long when voltage sag occurs around a zero crossing, such as phase $0^{\circ}$ and $180^{\circ}$. This paper describes the operating principle of the APF problem and proposes a modified all-pass filter (MAPF) to mitigate the inherent APF problem. In addition, a new fast peak detector using MAPF is proposed. The proposed detector is able to calculate a peak value within 0.5 ms, even when voltage sag occurs around zero crossing. The proposed fast peak detector is compared with the conventional detector using APF. Results show that the proposed detector has faster detection time in the whole phase range. Furthermore, the proposed fast peak detector can be effectively applied to unsymmetrical three-phase voltage sags. Simulation and experimental results verify the advantages of the proposed detector and MAPF.