• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.21 no.12
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• pp.1380-1393
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• 2010

This paper presents a design, fabrication and the test results of planar active electronically scanned array(AESA) radar prototype for airborne fighter applications using transmit/receive(T/R) module hybrid technology. LIG Nex1 developed a AESA radar prototype to obtain key technologies for airborne fighter's radar. The AESA radar prototype consists of a radiating array, T/R modules, a RF manifold, distributed power supplies, beam controllers, compact receivers with ADC(Analog-to-Digital Converter), a liquid-cooling unit, and an appropriate structure. The AESA antenna has a 590 mm-diameter, active-element area capable of containing 536 T/R modules. Each module is located to provide a triangle grid with $14.7\;mm{\times}19.5\;mm$ spacing among T/R modules. The array dissipates 1,554 watts, with a DC input of 2,310 watts when operated at the maximum transmit duty factor. The AESA radar prototype was tested on near-field chamber and the results become equal in expected beam pattern, providing the accurate and flexible control of antenna beam steering and beam shaping.

• Proceedings of the Korea Society for Simulation Conference
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• 1997.04a
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• pp.65-65
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• 1997

가입자가 B-ISDN(Broadband Integrated Services Digital Network) 서비스에 대한 shb은 수준의 품질 및 안정적인 서비스 제공을 요구함에 따라, 이러한 서비스를 제공하기 위한 ATM (Asynchronous Transfer Mode) 교환기에 대한 신뢰성 설계의 중요성은 증가하 고 있다. 교환기의 중요한 신뢰성 성능 척도 중의 하나인 연결 절단율 (Cutoff connection rate)은 총 연결시간 동안 절단된 연결수로 정의되며, 연결 절단은 호 설정 (Call setup) 단 계를 지나 서비스 중인 연결이 사용자의 요구가 아닌 시스템의 고장으로 종료될 때 발생한 다. 연결 절단율 추정 문제는 기존의 신뢰도 또는 가용도 예측을 위한 시뮬레이션과는 달리 시스템 구성 유니트들의 고장율, 수리율, 그리고 요구된 연결의 트래픽 특성 부분이 혼합된 문제이다. 따라서, B-ISDN 서비스의 중요한 특징인 다양한 트래픽 특성과 시스템의 구성 (Configuration)을 고려하여 연결 절단율을 해석적인 방법을 통하여 추정하는 데네는 어려 움이 있으며 시뮬레이션에 의한 방법이 적절하다. 본 고에서는 B-ISDN 서비스의 트래픽 특 성과 ATM 교환기의 시스템 구성 및 신뢰도 데이터로부터 시스템의 연결 절단율을 추정하 기 위한 시뮬레이터의 기능 및 구조, 시뮬레이션 수행 결과 등을 제시한다. 시뮬레이터는 AweSim 시뮬레이션과 CUser Written Code를 사용하여 개발하였다. 시뮬레이터의 구성 모듈은 크게 호 도착 모듈, 연결 제어 및 자원 할당 모듈, 유니트 고장 및 수리 모듈, 통계 량 수집 모듈 등으로 구성된다. 개발된 시뮬레이터는 B-ISDN 트래픽 파라메터와 연결 절단 율의 상호 관계 규명 및 시스템 설계 대안 (Design alternatives)에 대한 비교/평가에 활용 된다., 수중생물의 경우는 특히 수온, 수량 영양원등이다.(중략). 본 연구의 접근방법으로는 ASRS의 개념적인 Reference Model을 수립하고 이 Reference Model에 대한 Formal Model로 DEVS(Discrete Event System Specification)을 이용하여 시스템을 Modeling하였다. 이의 Computer Simulation을 위하여 DEVS형식론 환경에서의 Simulation Language인 DEVSim ++ⓒ를 이용하여 시스템을 구현하였다.. 실형 결과로는 먼저 선형 상미분방정식의 예로 mass-damper-spring system, 비선형 상미분방정식의 예로는 van der Pol 방정식, 연립 상미분방정식의 예로는 mixing tank problem 등을 보였으며, 그의 공학에서 일어나는 여러 가지 문제들도 다루었다.화물에 대한 방어력이 증가되어 나타난 결과로 여겨지며, 또한 혈청중의 ALT, ALP 및 LDH활성을 유의성있게 감소시키므로서 감잎 phenolic compounds가 에탄올에 의한 간세포 손상에 대한 해독 및 보호작용이 있는 것으로 사료된다.반적으로 홍삼 제조시 내공의 발생은 제조공정에서 나타나는 경우가 많으며, 내백의 경우는 홍삼으로 가공되면서 발생하는 경우가 있고, 인삼이 성장될 때 부분적인 영양상태의 불충분이나 기후 등에 따른 영향을 받을 수 있기 때문에 앞으로 이에 대한 많은 연구가 이루어져야할 것으로 판단된다.태에도 불구하고 [-wh]의미의 겹의문사는 병렬적 관계의 합성어가 아니라 내부구조를 지니지 않은 단순한 단어(minimal $X^{0}$ elements)로 가정한다. 즉, [+wh] 의미의 겹의문사는 동일한 구성요 소를 지닌 병렬적 합성어([$[W1]_{XO-}$ $[W1]_{XO}$ ]$_{XO}$

• Journal of IKEEE
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• v.7 no.2 s.13
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• pp.236-244
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• 2003

In this paper, RF and IF circuits for mobile terminals which have usually been implemented using expensive BiCMOS processes are designed using CMOS circuits, and a Tx CMOS RF/IF single chip for PCS applications is designed. The designed circuit consists of an IF block including an IF PLL frequency synthesizer, an IF mixer, and a VGA and an RF block including a SSB RF mixer and a driver amplifier, and performs all transmit signal processing functions required between digital baseband and the power amplifier. The phase noise level of the designed IF PLL frequency synthesizer is -114dBc/Hz@100kHz and the lock time is less than $300{\mu}s$. It consumes 5.3mA from a 3V power supply. The conversion gain and OIP3 of the IF mixer block are 3.6dB and -11.3dBm. It consumes 5.3mA. The 3dB frequencies of the VGA are greater than 250MHz for all gain settings. The designed VGA consumes 10mA. The designed RF block exhibits a gain of 14.93dB and an OIP3 of 6.97dBm. The image and carrier suppressions are 35dBc and 31dBc, respectively. It consumes 63.4mA. The designed circuits are under fabrication using a $0.35{\mu}m$ CMOS process. The designed entire chip consumes 84mA from a 3V supply, and its area is $1.6㎜{\times}3.5㎜$.

• Journal of IKEEE
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• v.21 no.3
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• pp.268-271
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• 2017

In this paper, we propose the development of high resolution $360^{\circ}$ omnidirectional IP camera with 12 million pixels. The proposed 12-megapixel high-resolution $360^{\circ}$ omnidirectional IP camera consists of a lens unit with $360^{\circ}$ omnidirectional viewing angle and a 12-megapixel high-resolution IP camera unit. The lens section of $360^{\circ}$ omnidirectional viewing angle adopts the isochronous lens design method and the catadioptric facet production method to obtain the image without peripheral distortion which is inevitably generated in the fisheye lens. The 12 megapixel high-resolution IP camera unit consists of a CMOS sensor & ISP unit, a DSP unit, and an I / O unit, and converts the image input to the camera into a digital image to perform image distortion correction, image correction and image compression And then transmits it to the NVR (Network Video Recorder). In order to evaluate the performance of the proposed 12-megapixel high-resolution $360^{\circ}$ omnidirectional IP camera, 12.3 million pixel image efficiency, $360^{\circ}$ omnidirectional lens angle of view, and electromagnetic certification standard were measured.

• Journal of Korea Water Resources Association
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• v.35 no.4 s.129
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• pp.359-366
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• 2002

The damages from the natural disasters, especially from the floods, have been increasing. Therefore, it is imperative to establish a BMP to diminish the damages from the floods and to enhance the welfare of the nation. Developed countries have been generating and utilizing flood risk maps to raise the alertness of the residents, and thereby achieving efficient flood management. The major objectives of this research were to develop a prototype management system for flood risk map to forecast the boundaries oi the inundation and to plot them through the integration of geographic and hydrologic database. For more efficient system development, the user requirement analysis was made. The GIS database design was done based on the results from the research work of river information standardization. A GIS database for the study area was built by using topographic information to support the hydrologic modeling. The developed prototype include several modules; river information edition module, map plotting module, and hydrologic modeling support module. Each module enabled the user to edit graphic and attribute data, to analyze and to represent the modeling results visually. Subjects such as utilization of the system and suggestions for future development were discussed.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.13 no.3
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• pp.184-196
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• 2020

In this paper, a single-bit 2nd-order delta-sigma modulator with the architecture of cascaded-of-integrator feedforward (CIFF) is proposed for precision measurement of current flowing through a secondary cell battery in a battery management system (BMS). The proposed modulator implements two switched capacitor integrators and a single-bit comparator with peripheral circuits such as a non-overlapping clock generator and a bias circuit. The proposed structure is designed to be applied to low-side current sensing method with low common mode input voltage. Using the low-side current measurement method has the advantage of reducing the burden on the circuit design. In addition, the ±30mV input voltage is resolved by the ADC with 15-bit resolution, eliminating the need for an additional programmable gain amplifier (PGA). The proposed a single-bit 2nd-order delta-sigma modulator has been implemented in a 350-nm CMOS process. It achieves 95.46-dB signal-to-noise-and-distortion ratio (SNDR), 96.01-dB spurious-free dynamic range (SFDR), and 15.56-bit effective-number-of-bits (ENOB) with an oversampling ratio (OSR) of 400 for 5-kHz bandwidth. The area and power consumption of the delta-sigma modulator are 670×490 ㎛2 and 414 ㎼, respectively.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.13 no.3
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• pp.623-628
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• 2009

The emergence of compact and low-power wireless communication sensors and actuators in the technology supporting the ongoing miniaturization of processing and storage allows for entirely the new kinds of embedded systems. These systems are distributed and deployed in environments where they may have been designed into a particular control method, and are often very dynamic. Collection of devices can communicate to achieve a higher level of coordinated behavior. Wireless sensor nodes deposited in various places provide light, temperature, and activity measurements. Wireless sensor nodes attached to circuits or appliances sense the current or control the usage. Together they form a dynamic and multi-hop routing network connecting each node to more powerful networks and processing resources. Wireless sensor networks are a specific-application and therefore they have to involve both software and hardware. They also use protocols that relate to both applications and the wireless network. Wireless sensor networks are consumer devices supporting multimedia applications such as personal digital assistants, network computers, and mobile communication devices. Wireless sensor networks are becoming an important part of industrial and military applications. The characteristics of modem embedded systems are the capable of communicating adapting the different operating environments. In this paper, We designed and implemented sensor network system which shows through host PC sensing temperature and humidity data transmitted for wireless sensor nodes composed wireless temperature and humidity sensor and designs sensor nodes using embedded system with the intention of studying USN.

• Journal of Broadcast Engineering
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• v.10 no.3
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• pp.413-421
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• 2005

As the population of HDTV is growing, among many useful features of modern set top boxes (STBs) or digital video recorders (DVRs), video browsing, visual bookmark, and picture-in-picture capabilities are very frequently required. These features typically employ reduced-size versions of video frames, or thumbnail images. Most thumbnail generation approaches generate DC images directly from a compressed video stream. A discrete cosine transform (DCT) coefficient for which the frequency is zero in both dimensions in a compressed block is called a DC coefficient and is simply used to construct a DC image. If a block has been encoded with field DCT, a few AC coefficients are needed to generate the DC image in addition to a DC coefficient. However, the bit length of a codeword coded with variable length coding (VLC) cannot be determined until the previous VLC codeword has been decoded, thus it is required that all codewords should be fully decoded regardless of their necessary for DC image generation. In this paper, we propose a method especially for fast DC image generation from an I-frame using multiple-symbol lookup table (mLUT). The experimental results show that the method using the mLUT improves the performance greatly by reducing LUT count by 50$\%$.

• Journal of Broadcast Engineering
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• v.6 no.3
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• pp.246-259
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• 2001

Due to recent rapid deployment of Internet streaming service and digital broadcasting service, the issue of how to efficiently support streaming workload in so called "Internet Home Appliance" receives prime interests from industry as well as academia. The underlying dilemma is that it may not be feasible to put cutting edge CPU, boards, disks and other peripherals into that type of device. The primary reason is its cost. Usually, Internet Home Appliances has its dedicated usage, e.g. Internet Radio, and thus it does not require high-end CPU nor high-end Va subsystem. The same reasoning applies to I/O subsystem. In Internet Home Appliances dedicated to handle compressed moving picture, it is not equipped with high end SCSI disk with fast rotational speed. Thus, it is mandatory to devise elaborate software algorithm to exploit the available hardware resources and maximize the efficiency of the system. This paper presents our experiences in the design and implementation of a new multimedia file system which can efficiently deliver the required disk bandwidth for a periodic I/O workload. We have implemented the file system on the Linux operating system, and examined itsperformance under streaming I/O workload. The results of the study show that the proposed file system exhibits superior performance than the Linux Ext2 file system under streaming I/O workload. The result of this work not only contribute to advance the state f art file system technology for multimedia streaming but also put forth the software which is readily available and can be deployed. deployed.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.11 no.3
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• pp.896-905
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• 2010

The sensor networks can be used attractively for various application areas. Time synchronization is important for any Ubiquitous Sensor Networks (USN) systems. USN makes extensive use of synchronized time in many contexts for data fusion. However existing time synchronization protocols are available only for homogeneous sensor nodes of USN. It needs to be extended or redesigned in order to apply to the USN with heterogeneous sensor nodes. Because heterogeneous sensor nodes have different clock sources with the SinkNode of USN, it is impossible to be synchronized global time. In addition, energy efficiency is one of the most significant factors to influence the design of sensor networks, as sensor nodes are limited in power, computational capacity, and memory. In this paper, we propose specific time synchronization based on master-slave topology for the global time synchronization of USN with heterogeneous sensor nodes. The time synchronization master nodes are always able to be synchronized with the SinkNode. Then time synchronization master nodes enable time synchronization slave nodes to be synchronized sleep periods. The proposed master-slave time synchronization for heterogeneous sensor nodes of USN is also helpful for power saving by maintaining maximum sleep time.