• Proceedings of the KIPE Conference
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• 2011.07a
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• pp.147-148
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• 2011

In this paper, implementation of digital control for critical conduction mode power factor correction (PFC) rectifier is presented. Critical conduction mode is widely used in medium and low power conversion application due to its minimized MOSFET turn-on loss and diode reverse-recovery problem. However, it needs additional zero current detection circuit and maximum frequency limit to properly turn the MOSFET on and avoid the excessive switching loss in light load operation. This paper explains the digital IC implementation and verifies its operation with 200-W prototype PFC rectifier.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.28B no.5
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• pp.343-356
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• 1991

An efficient real-time implementation of digital filtering algorithms using a multiprocessor system in a ring network is investigated. The development time and cost for implementing a high speed signal processing system can be considerably reduced because algorithm are implemented in software using commercially available digital signal processors. This method is based on a parallel block processing approach, where a continuously supplied input data is divided into blocks, and the blocks are processed concurrently by being assigned to each processor in the system. This approach not only requires a simple interconnection network but also reduces the number of communications among the processors very much. The data dependency of the blocks to be processed concurrently brings on dependency problems between the processors in the system. A systematic scheduling method has been developed by using a processors which can be used efficiently, the methods for solving dependency problems between the processors are investigated. Implementation procedures and results for FIR, recursive (IIR), and adaptive filtering algorithms are illustrated.

• The Transactions of the Korean Institute of Electrical Engineers A
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• v.48 no.3
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• pp.263-269
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• 1999

In this paper, an unifying design algorithm is presented for efficient digital implementation of continuous PID controller using general discrete orthogonal functions. The proposed algorithm is an algebraic method to determine controller parameters, which can unify controller design procedures divided into three ways. A set of linear equations for the controller design are derived from simple algebraic transformation based on general discrete orthogonal functions. By solving these equations, all of the controller parameters can be determined directly and simultaneously, which thus makes the design procedure systematic and straightforward. It does not involve any trial and error procedure, hence the difficulty of conventional approach can be avoided. The simulation results and discussions are given to demonstrate the efficiency of the proposed method.

• Proceedings of the KIEE Conference
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• 2005.10b
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• pp.210-212
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• 2005

The personal video recorder is a consumer electronics device that records television shows to a hard disk in digital format. In this paper, we propose an implementation method of personal video recorder for digital TV. The proposed personal video recorder includes cpu and system control modules, graphics and display module, audio DSP module, digital I/O module, NIM module, graphic software library, and embedded software modules for providing a lot of PVR functions such as live or reserved recordings, browsing of recorded content list, trick play and time shifting. Especially, combining trick play with time shifting makes much more convenient functions such as pausing live TV, instant replay of interesting scenes, and skipping advertising.

• Proceedings of the Korean Institute of Communication Sciences Conference
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• 2006.07a
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• pp.374-374
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• 2006

• Journal of the Society of Naval Architects of Korea
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• v.42 no.4 s.142
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• pp.411-420
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• 2005

World leading company and research centers have invested much cost and effort into a PLM and digital manufacturing field to obtain their own competitiveness. We have been trying to apply a digital manufacturing, especially simulation to ship production process as a part of PLM implementation for a shipyard. A shipbuilding production system and processes have a complexity and a peculiarity different from other kinds of production systems. So, new analysis and modeling methodology is required to implement digital shipyard. which is a digital manufacturing system for a shipbuilding company. This paper suggests an analysis and simulation modeling methodologies for an implementation of a digital shipyard. New methodologies such as a database-merged simulation, a distributed simulation, a modular simulation with a model library and a 3-tire simulation framework are developed.

• Proceedings of the Korea Technology Innovation Society Conference
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• 1998.05a
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• pp.3-3
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• 1998

Digital library system is an area of multimedia data production system which can differentiate itself from the traditional libraries. While the major role of the traditional libraries is servicing the customers, digital library system is a total system which produces new-formatted knowledge from the existing and new information, and servicing the knowledge to the customers. Thus digital library system must incorporate open and standardized document formats such as SGML, and make the knowledge shareable among the other digital library systems. In order to do show the efficient implementation for the effective digital library system, a technical alternative will be introduced as performing the Digital Library Pilot project.

• Journal of the Semiconductor & Display Technology
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• v.20 no.3
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• pp.184-188
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• 2021

In general, digital signage is a next-generation smart media that provides various information and advertisement services to many people indoors or outdoors using the Internet. Recently, digital signage is rapidly spreading in such a small indoor environment, that is, in an area closely related to daily life, for example, inside an elevator. However, in this kind of indoor environment where the stay time of persons is extremely limited, it would be not easy for them to keep advertisements in the user memory for a long time. In the digital signage display installed in an indoor environment, it is possible to think about the possibility for a function such as expanding the screen to a user's smartphone, which is now widely spread, to contain, store, and use the transmitted content. In this paper, we propose a method to extend the display of digital signage contents to personal smart phones with interaction function in such a limited environment. In order to make the system operation, the proposed system was verified by confirming the result of dual screen implementation in a smart phone through the prototype implementation of a digital signage system in an embedded Linux environment.

• Journal of Korea Society of Digital Industry and Information Management
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• v.15 no.4
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• pp.85-92
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• 2019

This paper presents a SDR-based Long Term Evolution Advanced (LTE-A) Physical Downlink Shared Channel (PDSCH) decoder using a multicore Digital Signal Processor (DSP). For decoder implementation, multicore DSP TMS320C6670 is used, which provides various hardware accelerators such as turbo decoder, fast Fourier transformer and Bit Rate Coprocessors. The TMS320C6670 is a DSP specialized in implementing base station platforms and is not an optimized platform for implementing mobile terminal platform. Accordingly, in this paper, the hardware accelerator was changed to the terminal implementation to implement the LTE-A PDSCH decoder supporting the multi-antenna and the functions not provided by the hardware accelerator were implemented through core programming. Also pipeline using multicore was implemented to meet the transmission time interval. To confirm the feasibility of the proposed implementation, we verified the real-time decoding capability of the PDSCH decoder implemented using the LTE-A Reference Measurement Channel (RMC) waveform about transmission mode 2 and 3.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.19 no.12
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• pp.2409-2417
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• 1994

The ODR(orthogonal double-rotation) digital lattice filters have desirable properties for VLSI implementation such as local connection, regularity and pipelinability. These filters are also known to exhibit good numerical behavior for finite precision implementation. Although these filters can be pipelined by the cut-set localization procedure, it should be noted that the maximum sample rate obtained by this technique is limited by the feedback computations. In this paper, a pipelining method for the ODR digital lattice filter is proposed, by which the sample rate can be increased at any desired level. it is also shown that the low-power CMOS digital implementation of ODR digital lattice filters can be done successfully using our pipelining method. The pipelining method is based on the properties of the Schur algoithm, constrained filter design methods, and the polyphase decomposition technique.