• 한국정보통신설비학회:학술대회논문집
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• 2006.08a
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• pp.141-144
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• 2006

The personal digital recorder is a consumer electronics device that records television shows to a hard disk in digital format. In this paper, we propose an implementation method of personal digital recorder for HDTV. The proposed personal recorder includes CPU and system control modules, graphics and display module, audio DSP module, digital I/O module, NIM module, graphic software library, and embedded software modules for providing a lot of personal digital recorder functions such as live or reserved recordings, browsing of recorder content list, trick lay and time shifting. Especially, combining trick play with time shifting makes much more convenient functions such as pausing live TV, instant replay of interesting scenes, and skipping advertising.

• The Journal of Information Technology
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• v.9 no.1
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• pp.33-39
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• 2006

This study is for the contents of development to the hardware system and software driving algorithm to implement the frequency band of about 7KHz los pass digital filter which has the cut-off frequency of 392Hz by interfacing of a microprocessor with its peripheral analog-to-digital converter chip and digital-to-analog converter chip. The simplicity of digital filter design without difficulty and the implementation of programmed digital filter can be realized by providing the interfacing method to implement the law pass digital filter for the biological signals and the realization method of computer algorithm by a microprocessor.

• Journal of Power Electronics
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• v.11 no.2
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• pp.113-119
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• 2011

This paper presents a DSP based direct digital control design and implementation for a high power boost converter. A single loop and dual loop voltage control are digitally implemented and compared. The real time workshop (RTW) is used for automatic real-time code generation. Experimental results of a 20 kW boost converter based on the TMS320F2808 DSP during reference voltage changes, input voltage changes, and load disturbances are presented. The results show that the dual loop control achieves better steady state and transient performance than the single loop control. In addition, the experimental results validate the effectiveness of using the RTW for automatic code generation to speed up the system implementation.

• Proceedings of the KIEE Conference
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• 2005.10b
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• pp.619-621
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• 2005

This paper proposes apractical design method for ship-to-ship missiles' autopilot. When the pre-designed analogue autopilot is implemented in digital way, theygenerally suffer from severe performance degradation and instability problem even for a sufficiently small sampling time. Also, aerodynamic uncertainties can affect the overall stability and this happens more severely when the nonlinear autopilot is digitally implemented. In order to realize a practical autopilot, two main issues, digital implementation problem and compensation for the aerodynamic uncertainties, are considered in this paper. MIMO (multi-input multi-output) nonlinear autopilot is presented first and the input and output of the missile are discretized for implementation. In this step, the discretization effect is compensated by designing an additional control input. Finally, we design a parameter adaptation law to compensate the control performance. Stability analysis and 6-DOF (degree-of-freedom) simulations are presented to verify the proposed adaptive autopilot.

• Journal of Korea Society of Digital Industry and Information Management
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• v.15 no.4
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• pp.93-101
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• 2019

This paper presents a software design and implementation of software-defined radio based IEEE 802.11ac encoder using Texas Instruments TMS320C6670 digital signal processor (DSP) platform. In this paper, the implemented encoder has the capability of generating all the signals consisting of preamble field and data field under different modulation & coding scheme in the IEEE 802.11ac standard. Moreover, the flexibility in choosing different rate, bandwidth, or mode can also be achieved by software reconfiguration using the DSP. As a result, by utilizing the computing power provided by multi-cores as well as the FFT coprocessors in the DSP, the required maximum throughput 78Mbps can be fully reached within 4 ㎲ for each OFDM symbol in the case of 20MHz bandwidth of IEEE 802.11ac.

• International Journal of Computer Science & Network Security
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• v.21 no.5
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• pp.183-191
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• 2021

The advanced development of the world's economies requires a detailed study of the impact of factors on the level of digitalization, to ensure economic growth and promote the use of information and communication technologies in the digital economy. Digitalization of the world's economies is ensured through the implementation of relevant regulations and policy decisions to implement public policy and strategy of the digital economy. The purpose of the study is to establish the pattern of the impact of factors on the level of digitalization of world economies by conducting a regression analysis to reflect the dependence of the impact of factors on the level of digitalization in 25 economies (by IMD digital competitiveness), to check the level of digitalization of the world's economies. It is necessary to analyze the ranking of countries in the world according to the DiGiX Index, IMD, and DESI Digital Competitiveness Rating. Research methods: information synthesis method; regression analysis; systematization, and generalization. Results. It was found that because of regression analysis, the value of the coefficient of determination indicates that the regression model by 78% explains the relationship between future readiness of countries to implement digital technologies and information and communication technologies, but there are still a small number of other factors not included in the regression model. It is determined that the greatest progress among EU member states for the period 2015-2020 according to the DESI index belongs to Ireland, the Netherlands, Malta, and Spain. It is established that Estonia, Spain, and Denmark are in the lead in the DESI rating, in terms of e-government implementation. The study found that the impact of factors on the level of digitalization of world economies contributes to solving current economic problems through further implementation of information and communication technologies and improving legislation in the digital economy, which will ensure the implementation of effective digital policy. It is established that ensuring the appropriate level of digitalization of the world's economies should solve the problems in the digital economy sector faced by governments and businesses, which requires the implementation of measures to regulate and ensure the continued operation of the digital economy.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.23 no.7
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• pp.1718-1731
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• 1998

Digital quadrature demodulator is needed for the coherent demodulation in the digital communication systems such as Binary Phase-Shift-Keying, Quadrature Phase-Shift-Keying, and Quadrature Anmplitude Modulation. Conventaionally, the DDFS (Direct Digital Frequency Synthsizer) is used for generating the carrier signal and seperate multi-pliers are used for mixing. And the DDFS is implemented using the ROM (Read Only Memory), which can be a bottle-neck neck when the fast-speed and small-area implementation is required. A new architecture is developed, which employs the circular rotation mode of the CORDIC algorithm for signal mixing as well as carrier generation. To optimize the hardware design parameters, the finiteword-length effects of the proposed implementation arachitecture are analyzed in comparison with a conventional ROM-based architecture. The hardware costs are also estimated, which showed that the proposed architecture occupies only a third of the area of the conventional ROM-based architecture for the same performance. A full-custom VLSI is developed using the proposed architecture.

• Journal of Digital Contents Society
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• v.9 no.2
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• pp.235-244
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• 2008

The purpose of this paper is to analyze and compare the existing digital media asset management systems and develop a prospective implementation model. As a result of conducting this research, it is recommended that the prospective system consists of an archiving server, a processing server, and an interface system. This result suggests important starting point to develop a resonable and reliable implementation model for digital media asset management system.

• JSTS:Journal of Semiconductor Technology and Science
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• v.15 no.4
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• pp.477-483
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• 2015

The k-Winners-Take-All (kWTA) is an operation to find the largest k (>1) inputs among N inputs. Parallel search algorithm of kWTA for digital inputs is not invented yet, so most of digital kWTA architectures have O(N) time complexity. A parallel search algorithm for digital kWTA operation and the circuits for its VLSI implementation are presented in this paper. The proposed kWTA architecture can compare all inputs simultaneously in parallel. The time complexity of the new architecture is O(logN), so that it is scalable to a large number of digital data. The high-speed kWTA operation and its O(logN) dependency of the new architecture are verified by simulations. It takes 290 ns in searching for 5 winners among 1024 of 32 bit data, which is more than thousands of times faster than existing digital kWTA circuits, as well as existing analog kWTA circuits.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.17 no.12
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• pp.1371-1379
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• 1992

In this paper, we describe the general concept of digital mobile communications system and present a client-server model for the implementation of roaming function, which is on of the most important functions in digital mobile communications system. And finally we also describe our simulation test and analysis for the presented client-server model.