• International Commerce and Information Review
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• v.6 no.1
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• pp.157-189
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• 2004

Recently, Digital Switch has risen as one of the important issues on which academic and industrial world focus in order to bring organizational transformation to a company that wants to adapt itself to the rapidly changing business environment. However, the discussion in the Digital Switch has been so much concentrated in the study of each static system, model of their performance and the development of monitoring each of them, that only few theoretical research has been carried out on the dynamic process of how each system in the organization experienced the change in terms of the level of digital transformation that can occur in the whole organization facing the change of digital environment. Therefore this thesis aims to develop a new model & strategy of switching to global digital by OEM companies in Jeonlabuk-do that enables us to check out and predict the Digital Switch progress. This model is the first Digital Switch process evaluation intended for empirical study, especially by integrating the many indices that have not been examined empirically by the existing studies. We expect that the results from this research will help corporate e-business strategy planners to devise and analyze the Digital Switch strategies effectively by recognizing the companies' current situation in comparison with their previous and other firms' level, respectively.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.16 no.3
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• pp.145-153
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• 2016

Cable TV with largest subscription base in pay TV market has difficulty in managing the task of digital switch over. This study analyzed the factors in delay of cable TV switch over and examined the impact of pay TV market structure and competition. The delaying factors turned out to be the lack of incentives and resources of cable TV operators, insufficient policy measures and acceptance tolerance issues of subscribers. Since cable TV operators with monopolistic status in pay TV market had continuous profit from analog service, they were not responsive to digital switch over which requires additional investment. Policy measures including support for the low income household and mandatory cut-off point for stopping analog broadcasting. Subscriber's willingness to accept digital broadcasting in terms of price sensitivity and preference for convenient operation also played a role. Introduction of IPTV in pay TV market influenced the speed of digital switch over of cable TV operators. MSOs with economies of scale showed higher digital switch over rate than independent SO.

• Journal of Korea Trade
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• v.26 no.6
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• pp.20-40
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• 2022

Purpose - In recent times, the international trade environment has been changing rapidly, centering on the online market. In the post-COVID-19 era, small and medium-sized trading companies are facing the problem of not being properly provided with overseas market research, market trend analysis, and trade-related information. Cloud-based digital trade is being sought as an alternative to solve these problems; however, there is a lack of research on the intention to switch to digital trade among small and medium-sized trading companies. Therefore, this study empirically analyzes the intention to switch to digital trade based on the migration theory, and through this, attempts to identify each factor that affects the intention to switch to digital trade. Design/methodology - In this study, in order to identify factors influencing intention to switch to digital trade and innovation resistance of small and medium-sized trading companies, through previous research on migration theory and the PPM (Push, Pull, Mooring) model, each variable was selected for the purpose of the study. Based on this, a research model was established for the factors affecting switching to digital trade of small and medium-sized trading companies and empirically analyzed. In addition, considering the differences in the innovation propensity and maturity of information infrastructure of trading companies as the recipients of innovation, this study analyzes the moderating effect of the mooring effect and seeks ways to establish specific strategies according to the degree. Findings - As a result of empirical analysis, the pull effect was found to have the greatest influence on intention to switch to digital trade. However, the pull factor was found to have an effect on user resistance, and it was confirmed that it was a factor simultaneously inducing positive and negative consumption behaviors among users. In addition, it was found that the higher the company's innovation propensity, the higher the pull effect's influence on the intention to switch, and analysis showed that the push effect had no influence. In addition, companies with high information infrastructure maturity were expected to have a relatively high level of intention to switch compared to companies with low information infrastructure maturity, and the difference between the two groups was found not to be statistically significant. Originality/value - This study is a timely study in that it demonstrated the effect on the switching to cloud-based digital trade for small and medium-sized trading companies and that the cloud system related to digital trade is in full swing. There are academic implications in that it revealed that the pull effect is an important factor in the intention to switch to cloud service. Practical implications were presented in that small and medium-sized trading companies suggested ways to increase the value of the cloud system for switching to digital trade and a way to increase the switching ratio by minimizing the mooring effect. In addition, the study argues that active institutional support from the government is needed to activate cloud service.

• Proceedings of the IEEK Conference
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• 1998.06a
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• pp.130-133
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• 1998

A imput buffer typed ATM switch and an appropriate cell-scheduling algorithm are necessary for avoiding output blocking and internal blocking respectively. The algorithm determining a set of non-blocking data cells from the queues can greatly affect on the switch's throughput as well as the behavior of the queues. In this paper bit pattern optimization combined with the Token method in presented in order to improve the performance of ATM switch. The digital Hopfield neural cell scheduler is designed and used for the maximum numbers of cells in real-time

• Journal of Practical Engineering Education
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• v.8 no.2
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• pp.95-101
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• 2016

In this paper, we introduce an implementation method of switch-based LED (Light Emitting Diode) Art logic circuits to help understanding the operation principle of digital logic circuits. Digital logic circuit practice using bread board is widely practiced in colleges or high schools in South Korea. However, actual digital logic circuit practice lacks examples of basic implementation, and as results of this problem, study with more complicated examples disturbs understanding the basic operation principle of digital logic circuits. Therefore, we proposed and tested an implementation method of switch-based LED Art logic circuits to help understanding the necessity of digital logic circuits which control signals of multiple output devices simultaneously.

• Journal of electromagnetic engineering and science
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• v.14 no.4
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• pp.411-414
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• 2014

A switch is one of the most useful circuits for controlling the path of signal transmission. It can be added to digital circuits to create a kind of gate-level device and it can also save information into memory. In RF subsystems, a switch is used in a different way than its general role in digital circuits. The most important characteristic to consider when designing an RF switch is keeping the isolation as high as possible while also keeping insertion loss as low as possible. For high isolation, we propose leakage signal cancellation and inductive switching for designing a singlepole double-throw (SPDT) RF switch. By using the proposed method, an isolation level of more than 23 dB can be achieved. Furthermore, the heterojunction bipolar transistor (HBT) process is used in the RF switch design to keep the insertion loss low. It is demonstrated that the proposed RF switch has an insertion loss of less than 2 dB. The RF switch operates from 1 to 8 GHz based on the $0.18-{\mu}m$ SiGe HBT process, taking up an area of $0.3mm^2$.

• Journal of information and communication convergence engineering
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• v.10 no.1
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• pp.85-90
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• 2012

A 40-MS/sec 10-bit pipelined analog to digital converter (ADC) with a 1.2 Vpp differential input signal is proposed. The implemented pipelined ADC consists of eight stages of 1.5 bit/stage, one stage of 2 bit/stage, a digital error correction block, band-gap reference circuit & reference driver, and clock generator. The 1.5 bit/stage consists of a sub-ADC, digital to analog (DAC), and gain stage, and the 2.0 bit/stage consists of only a 2-bit sub-ADC. A bootstrapped switch with a constant resistance is proposed to improve the linearity of the input switch. It reduces the maximum VGS variation of the conventional bootstrapped switch by 67%. The proposed bootstrapped switch is used in the first 1.5 bit/stage instead of a sample-hold amplifier (SHA). This results in the reduction of the hardware and power consumption. It also increases the input bandwidth and dynamic performance. A reference voltage for the ADC is driven by using an on-chip reference driver without an external reference. A digital error correction with a redundancy is also used to compensate for analog noise such as an input offset voltage of a comparator and a gain error of a gain stage. The proposed pipelined ADC is implemented by using a 0.18-${\mu}m$ 1- poly 5-metal CMOS process with a 1.8 V supply. The total area including a power decoupling capacitor and the power consumption are 0.95 $mm^2$ and 51.5 mW, respectively. The signal-to-noise and distortion ratio (SNDR) is 56.15 dB at the Nyquist frequency, resulting in an effective number of bits (ENOB) of 9.03 bits.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.8 no.5
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• pp.35-41
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• 2008

This paper presents the design method of current-mode signal processing for high speed and low power digital audio signal processing. The digital audio processor requires a digital signal processing such as fast Fourier transform (FFT), which has a problem of large power consumption according to the settled point number and high speed operation. Therefore, a current-mode signal processing with a switched Current (SI) circuit was employed to the digital audio signal processing because a limited battery life should be considered for a low power operation. However, current memory that construct a SI circuit has a problem called clock-feedthrough. In this paper, we examine the connection of dummy MOS that is the common solution of clock-feedthrough and are willing to calculate the relation of width between dummy MOS for a proposal of the design methodology for improvement of current memory. As a result of simulation, in case of that the width of memory MOS is 20um, ratio of input current and bias current is 0.3, the relation of width between switch MOS and dummy MOS is $W_{M4}=1.95W_{M3}+1.2$ for the width of switch MOS is 2~5um, it is $W_{M4}=0.92W_{M3}+6.3$ for the width of switch MOS is 5~10um. Then the defined relation of MOS transistors can be a useful design guidance for a high speed low power digital audio processor.

• Proceedings of the Korean Institute of Communication Sciences Conference
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• 1986.04a
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• pp.142-145
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• 1986

The traffic characteristics of digital switch network depend on the structure, blocking probability, path searching method and etc. This paper presents the study of TDX-1 switch network traffic capacity by considering some decisive factors such as call processing software, switch network structure and control scheme. Conclusively the study shows that the switch network of TDX-1 can handle approximatly up to 1650 Erlang.

• Proceedings of the KIEE Conference
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• 2007.07a
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• pp.1978-1979
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• 2007

In this paper, the authors introduce a high-speed microprocessor based on automatic vacuum capacitor switch with a modified digital filter design using distributed arithmetic. The automation trends particularly the automatic vacuum capacitor switch has helped ameliorate the power factor essentials and automatically triggered to close when the line current exceeds rated value. Microprocessor relays use digital filters to extract only the fundamental and attenuate harmonics. To provide optimum speed characteristics a distributed arithmetic based filter design in the microprocessor controller which not only enhances filtering speed but additionally enables lower power consumption at the cost of area has been introduced. The result is a unified description that describes a digital filter structure down to bit level.