• 디지털산업정보학회논문지
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• 제10권1호
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• pp.131-138
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• 2014

This paper is on a stereo acoustic echo canceller with the blind signal separation for post processing. The convergence speed of the stereo acoustic echo canceller is deteriorated due to mixing two residual signals which are update signals of each echo canceller. To solve this problem, we are to use the blind signal separation(BSS) method separating the mixed signals after the echo cancellers. The blind signal separation method can extracts the source signals by means of the iterative computations with two input signals. We had verified performances of the proposed acoustic echo canceller for stereo through simulations. The results of simulations show that the acoustic echo canceller for stereo using this algorithm operates stably without divergence in the normal state. And, when the speech signals were inputted, this echo canceller achieved about 2dB higher ERLE with the BSS post processing method than without this method. This stereo echo canceller showed the best performance in the case of inputting the real voice signal.

• 한국정보통신학회:학술대회논문집
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• 한국해양정보통신학회 2005년도 추계종합학술대회
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• pp.820-822
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• 2005

본 논문에서는 16비트 혹은 32비트 고정 소수점 연산을 지원하는 디지털 신호처리 기능을 강화한 명령어 축소형 마이크로프로세서를 설계하였다. 설계한 마이크로프로세서는 명령어 축소형 마이크로 아키텍쳐의 표준에 따라서 범용 마이크로프로세서의 기능과 디지털 신호처리 프로세서의 기능을 함께 갖추고 있다. 산술연산기능 유닛, 디지털 신호처리 유닛, 메모리 제어 유닛으로 구성되어 있으며, 이 연산 유닛들이 병렬적으로 수행되어 디지털 신호처리 명령이나 로드/스토어 명령어의 지연된 시간을 보상할 수 있게 설계되었다. 이 연산유닛들을 병렬적으로 동작하게 함으로써 5단계 파이프라인의 구조로 고성능 마이크로프로세서를 구현하였다.

• 융합신호처리학회논문지
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• 제14권1호
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• pp.39-44
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• 2013

본 논문에서는 멀티암(multi-arm) 스파이럴 안테나용 디지털 위상천이기(digital phase-shifter)를 힐버트 변환(Hillbert transform)을 이용하여 설계하였다. 힐버트 변환은 입력신호에 포함된 모든 주파수 성분을 $90^{\circ}$ 위상천이 시키며, 퓨리에 변환(Fourier transform)과 역퓨리에 변환(Inverse FIT)을 통해 구현된다. 디지털 위상천이기는 ADC(Analog-digital converter)로 샘플링된 입력신호에 힐버트 변환을 적용하여 위상차가 $90^{\circ}$인 두 신호를 생성하고, 이 두 신호를 이용하여 입력신호의 위상을 천이위상만큼 천이시키게 한다. 힐버트 변환 기반의 디지털 위상천이기는 Xilinx사의 System generator로 설계되었고, 입력 잡음, FFT 포인트 수, 샘플링 주기, 입력신호의 초기위상 및 천이 위상각 등에 따른 위상천이 성능을 시뮬레이션 하였으며, Matlab 결과와 비교하여 일치함을 확인하였다.

• 전자공학회논문지B
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• 제33B권6호
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• pp.128-135
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• 1996

In this paper, a digital signal processing method of AFC (automatic frequency control) is proposed for a home use VCR system. The proposed method has the ability of frequency tracking of a wide range. Implemented with digital circuits, the system is to be used in a digital video system and saves the cost of a hardware compared with a conventional analog automatic frequency control method using several PLL's in case of making home use VCR systems compatible with several TV systems.

• 융합신호처리학회 학술대회논문집
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• 한국신호처리시스템학회 2001년도 하계 학술대회 논문집(KISPS SUMMER CONFERENCE 2001
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• pp.137-140
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• 2001

In this paper, Fuzzzy Digital PI+D Controller plans for load, noise, plant change, Fuzzy Controller makes use of simple four rule and membership function, and plant used three phase Induction Motor. Characteristic of system compared from experimentation respectively the proposed Control System, Digital PID Control and Digital PI+D Control System.

• 한국생산제조학회지
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• 제9권1호
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• pp.119-127
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• 2000

In this study the classified researches the artificial and natural flaws in welding parts are performed using the pattern recognition technology. For this purpose the signal pattern recognition package including the user defined function was developed and the total procedure including the digital signal processing feature extraction feature selection and classifi-er selection is teated by bulk,. Specially it is composed with and discussed using the statistical classifier such as the linear discriminant function the empirical Bayesian classifier. Also the pattern recognition technology is applied to classifica-tion problem of natural flaw(i.e multiple classification problem-crack lack of penetration lack of fusion porosity and slag inclusion the planar and volumetric flaw classification problem), According to this result it is possible to acquire the recognition rate of 83% above even through it is different a little according to domain extracting the feature and the classifier.

• 전자공학회논문지C
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• 제34C권9호
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• pp.33-42
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• 1997

Fixed-point optimization utility software that can aid scaling and wordlength determination of digital signal processign algorithms written in C or C$\^$++/ language is developed. This utility consists of two programs: the range estimator and the fixed-point simulator. The former estimates the ranges of floating-point variables for automatic scaling purpose, and the latter translates floating-point programs into fixed-point equivalents for evaluating te fixed-point performance by simulation. By exploiting the operator overloading characteristics of C$\^$++/ language, the range estimation and the fixed-point simulation can be conducted just by modifying the variable declaration of the original program. This utility is easily applicable to nearly all types of digital signal processing programs including non-linear, time-varying, multi-rate, and multi-dimensional signal processing algorithms. In addition, this software can be used for comparing the fixed-point characteristics of different implementation architectures.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1987년도 전기.전자공학 학술대회 논문집(II)
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• pp.1326-1328
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• 1987

This paper describes the design of digital signal processing system for the automatic diagnosis of ECG. The system comprises analog hardware, digital hardware, and control system by microcomputer. Also, since digital signal processing system can be equipped easily in microcomputer for the compact size(Single board), We expect to develop the Portable ECG Automatic Diagnosis System using this System.

• 산업기술연구
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• 제23권A호
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• pp.55-61
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• 2003

In this study, a signal processing and related techniques for development of a weight measuring system using a digital loadcell which is able to satisfy the important properties of WIM (weighing-in-motion) system have been investigated. A fast and high accurate signal processing of the digital load cell sensor for weighing-in-motion system is presented. A/D conversion system is constructed to realize a stable A/D conversion and signal processing algorithm using DSP and microprocessor. A new technique for vibration and measuring speed of the system is also investigated. The proposed method was applied to the actual design and the experimental results showed good performance of the weighing speed and stability.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2008년도 하계종합학술대회
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• pp.181-182
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• 2008

In this paper, an cost-effective system architecture is proposed to implement digital predistortion scheme for linearizing the PA amplifing TDD wideband signal. To make digital predistorted signal for compensating nonlinearity of PA, a dedicated ADC and a frequency-down converter are necessary. Proposed scheme is based on the TDD feature that the RF receiver frontend is idle state during the downlink signal processing time and utilize them to make the digital predistorted signal for PA.