• Journal of information and communication convergence engineering
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• v.9 no.3
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• pp.276-281
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• 2011

This paper presents a method of constructing the switching function using edge-valued decision diagrams. The proposed method is as following. The edge-valued decision diagram is a new data structure type of decision diagram which is recently used in constructing the digital logic systems based on the graph theory. Next, we apply edge-valued decision diagram to function minimization of digital logic systems. The proposed method has the visible, schematic and regular properties.

• Proceedings of the KIEE Conference
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• 1999.07b
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• pp.749-751
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• 1999

We acquired operating data in an existing steam turbine power plant using analog control system to investigate operation characteristics. We analyzed a load control logic to develop a digital turbine control system. The load control logic is constituted of load target, load reference, loading rate, load limit and admission mode transfer of valve. The result of this paper is utilized to implement a digital turbine control system.

• Journal of Digital Contents Society
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• v.10 no.3
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• pp.413-421
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• 2009

Recently, various kinds of arcade games are offered through the network with the internet's development. And for the Grid Logic game, it is opened up for everyone who uses the internet but it has a disadvantage that only the provided puzzles can be played. To improve this, in this paper, we developed a Grid Logic game contents using an image of user's as a puzzle. In order to do this, we suggested a threshold decision method, the pre-processing stage of image processing. We showed a method of detecting aim image from a binary image, showed up by the suggested way, and a method of changing into the game data and carrier of the meaning as a specific image at the end of the game are the objects of this paper. The suggested algorithm is constructed as a Java applet and applied to the 10 objects such as characters, logos, persons, etc. to show that this algorithm is suitable for the appropriate acquisition of the Grid Logic game data through the experiment.

• Journal of Institute of Control, Robotics and Systems
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• v.13 no.8
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• pp.798-803
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• 2007

In case of minimized digital camera and mobile digital camera, it's difficult to get the high quality image by conventional AE(Auto Exposure) algorithm because of restriction of system organization. In this paper, a new algorithm that adopts a target setting, a compensation of feedback delay and a gamma correction, etc, are suggested for improving a noise increase and an output sensitivity decrease due to system minimization. We also suggest a method using fuzzy logic which can decide more effectively the ES(Electric Shutter) value and the AGC(Analog Gain Control) value than conventional system.

• Journal of Electrical Engineering and Technology
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• v.10 no.4
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• pp.1527-1539
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• 2015

In this paper the hardware implementation of the direct torque control based on the fuzzy logic technique of induction motor on the Field-Programmable Gate Array (FPGA) is presented. Due to its complexity, the fuzzy logic technique implemented on a digital system like the DSP (Digital Signal Processor) and microcontroller is characterized by a calculating delay. This delay is due to the processing speed which depends on the system complexity. The limitation of these solutions is inevitable. To solve this problem, an alternative digital solution is used, based on the FPGA, which is characterized by a fast processing speed, to take the advantage of the performances of the fuzzy logic technique in spite of its complex computation. The Conventional Direct Torque Control (CDTC) of the induction machine faces problems, like the high stator flux, electromagnetic torque ripples, and stator current distortions. To overcome the CDTC problems many methods are used such as the space vector modulation which is sensitive to the parameters variations of the machine, the increase in the switches inverter number which increases the cost of the inverter, and the artificial intelligence. In this paper an intelligent technique based on the fuzzy logic is used because it is allows controlling the systems without knowing the mathematical model. Also, we use a new method based on the Xilinx system generator for the hardware implementation of Direct Torque Fuzzy Control (DTFC) on the FPGA. The simulation results of the DTFC are compared to those of the CDTC. The comparison results illustrate the reduction in the torque and stator flux ripples of the DTFC and show the Xilinx Virtex V FPGA performances in terms of execution time.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.9 no.1
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• pp.89-94
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• 2009

This paper proposes the algorithms that design the highly digital logic circuit and assign the code to each node of DCG(Directed Cyclic Graph) of length ${\zeta}$. The conventional algorithm have some problems, so this paper introduce the matrix equation from DCG of length ${\zeta}$ and proposes highly digital logic circuit design algorithms according to the DCG of length ${\zeta}$. Using the proposed circuit design algorithms in this paper, it become realized that was able to design from former algorithm. Also, making a comparison between the circuit using former algorithm and this paper's, we testify that proposed paper's algorithm is able to realize more optimized circuit design. According to proposed circuit design algorithm in this paper, it is possible to design current that DCG have natural number, so it have the following advantages, reduction of the circuit input/output digits, simplification of circuit composition, reduction of computation time and cost. And we show comparability and verification about this paper's algorithm.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.10 no.10
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• pp.1773-1778
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• 2006

This paper propose the method of constructing the Digital Logic Systems based on the Improved Automatic Theorem Proving Techniques(IATP) over Finite Fields. The proposed method is as following. First, we discuss the background and the important mathematical properties for Finite Fields. Also, we discuss the concepts of the Automatic Theorem Proving Techniques(ATP) including the syntactic method and semantic method, and discuss the basic properties for the Alf. In this step, we define several definitions of the IAIP, Table Pseudo Function Tab and Equal. Next, we propose the T-gate as Building Block(BB) and describe the mathematical representation for the notation of T-gate. Then we discuss the important properties for the T-gate. Also, we propose the several relationships that are Identity relationship, Constant relationship, Tautology relationship and Mod R cyclic relationship. Then we propose Mod R negation gate and the manipulation of the don't care conditions. Finally, we propose the algorithm for the constructing the method of the digital logic systems over finite fields. The proposed method is more efficiency and regularity than my other earlier methods. Thet we prospect the future research and prospects.

• Transactions of the Korean Society of Mechanical Engineers A
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• v.40 no.2
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• pp.147-156
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• 2016

In this paper, optimal designs of bicycle frame were studied for weight reduction of bicycle using carbon-fiber-reinforced plastic (CFRP), glass-fiber-reinforced plastic (GFRP) and Kevlar-fiber-reinforced plastic (KFRP), respectively. Based on the anisotropic properties of FRP material, stacking angle and thickness optimization were performed under the safety reference of European committee for standardization (CEN) to ensure the stability of bicycle frame. Finally, performances of FRP bicycle frame was evaluated by digital logic method based on the optimized results of weight, strength properties and cost. Then, the optimized bicycle frame composed of each FRPs were evaluated and ranked by total performance values.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.21 no.4
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• pp.781-788
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• 2017

This paper proposes a new algorithm for comparing amplitude between multiple digital input signals and its digital logic architecture. After simultaneously comparing multiple inputs, the proposed algorithm can provide the information of the largest (or smallest) value among them by using a simple digital logic function. The drawback of the method is to increase hardware resource. To overcome this we propose a reuse method of the overlapped logic operation. The proposed method focuses on enhancing the operational clock frequency, in other words decreasing combinational delay time. After implementing the comparing method with HDL (hardware description language), we experiment on it with environment of Cyclone III EP3C40F324A7 FPGA of Altera Inc. In case of 4 input signals, it can increase the operational speed as mush as 1.66 times with 1.20 times the hardware resource. In case of 8, it can also have 2.29 times the clock frequency and 2.15 times the hardware resource.

• The Transactions of the Korean Institute of Electrical Engineers D
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• v.50 no.1
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• pp.45-50
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• 2001

With increasing complexity of digital logic circuits, fast and accurate verification of functional behaviour becomes most critical bottleneck in meeting time-to-market requirement. This paper presents several techniques for accelerating a cycle-based logic simulation. The acceleration techniques include parallel pattern logic evaluation, circuit size reduction, and the partition of feedback loops in sequential circuits. Among all, the circuit size reduction plays a critical role in maximizing logic simulation speedup by reducing 50% of entire circuit nodes on the average. These techniques are incorporated into a levelized table-driven logic simulation system rather than a compiled-code simulation algorithm. Finally, experimental results are given to demonstrate the effectiveness of the proposed acceleration techniques. Experimental results show more than 27 times performance improvement over single pattern levelized logic simulation.