• ETRI Journal
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• v.26 no.6
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• pp.589-596
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• 2004

Packaging technologies for a broadband and narrowband modulator with a traveling wave electro-absorption modulator (TWEAM) device were developed. In developing a broadband modulator, the effects of the device and packaging designs on the broadband performance were investigated. The optimized designs were obtained through a simulation with the result that we developed a broadband modulator with a 3 dB bandwidth of 38 GHz in the electrical-to-optical (E/O) response, an electrical return loss of less than -10 dB at up to 26 GHz, an rms jitter of 1.832 ps, and an extinction ratio of 5.38 dB in a 40 Gbps non-return to zero (NRZ) eye diagram. For analog application, the effect of the RF termination scheme on the fractional bandwidth was studied. The microstrip line with a double stub as a matching circuit and a laser trimming process were used to obtain an $S_{11}$ of -34.58 dB at 40 GHz and 2.9 GHz bandwidth of less than -15 dB.

• Journal of The Korean Astronomical Society
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• v.44 no.5
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• pp.177-193
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• 2011

We present a photometric study of five open clusters (Czernik 5, Alessi 53, Berkeley 49, Berkeley 84, and Pfleiderer 3) in the Sloan Digital Sky Survey. The position and size of these clusters are determined using the radial number density profiles of the stars, and the member stars of the clusters are selected using the proper motion data in the literature. We estimate the reddening, distance and age of the clusters based on the isochrone fitting in the color-magnitude diagram. The foreground reddenings for these clusters are estimated to be E(B - V ) = 0.71 - 1.55 mag. The distances to these clusters are derived to be 2.0 - 4.4 kpc, and their distances from the Galactic center range from 7.57 kpc to 12.35 kpc. Their ages are in the range from 250 Myr to 1 Gyr. Berkeley 49 and Berkeley 84 are located in the Orion spur, Czernik 5 is in the Perseus arm, and Pfleiderer 3 and Alessi 53 are located beyond the Perseus arm.

• Korean Journal of Computational Design and Engineering
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• v.12 no.1
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• pp.74-85
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• 2007

During the lifecycle of a nuclear power plant many organizations are involved in KOREA. Korea Plant Engineering Co. (KOPEC) participates in the design stage, Korea Hydraulic and Nuclear Power (KHNP) operates and manages all nuclear power plants in KOREA, Dusan Heavy Industries manufactures the main equipment, and a construction company constructs the plant. Even though each organization has a digital data management system inside and obtains a certain level of automation, data sharing among organizations is poor. KHNP gets drawing and technical specifications from KOPEC in the form of paper. It results in manual re-work of definition and there are potential errors in the process. A data warehouse based on a neutral model has been constructed in order to make an information bridge between design and O&M phases. GPM(generic product model), a data model from Hitachi, Japan is addressed and extended in this study. GPM has a similar architecture with ISO 15926 "life cycle data for process plant". The extension is oriented to nuclear power plants. This paper introduces some of implementation results: 1) 2D piping and instrument diagram (P&ID) and 3D CAD model exchanges and their visualization; 2) Interface between GPM-based data warehouse and KHNP ERP system.

• Proceedings of the Korea Society of Information Technology Applications Conference
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• 2005.11a
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• pp.339-342
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• 2005

In order to support ultrawide-band signal generation for low rate WPAN, several types of signal generation mechanisms are suggested such as Chaos, Impluse, and Chirp signals by the activity of IEEE 802.15.4a. The communication system applied chaos theory may have ultrawide-band characteristics with spread spectrum and immunity from multipath effect. In order to use the advantage of chaotic signal generation, we introduce the system implementation of communication and networking systems with the chaos UWB signal. This system may be composed of mainly three parts in hardware architecture : RF transmission with chaotic signal generation, signal receiver using amplifiers and filters, and 8051 & FPGA unit. The most difficult part is to implement the chaotic signal generator and build transceiver with it. The implementation of the system is devidced into two parts i.e. RF blocks and digital blocks with amplifiers, filters, ADC, 8051 processor, and FPGA. In this paper, we introduce the system block diagram for chaotic communications. Mainly the RF block is important for the system to have good performance based on the chaotic signal generator. And the main control board functions for controlling RF blocks, processing Tx and Rx data, and networking in MAC layer.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.58 no.1
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• pp.20-26
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• 2009

In this paper, the switching mode conversion type pulse charger by fly-back converter method for lead battery of the solar cell generator equipment is proposed. And we propose the control circuit and design method of insulated switching mode convert type pulse charger by fly-back convert method in the lead battery. The proposed system can minimize the current consumption by digital pulse. Also the proposed system can generate the constant 10[KHz] frequency, transmit the signal with main control system in the power control system. And it supervises the state of lead battery using one chip micro processor. The proposed the switching mode conversion type pulse charger by the fly-back converter method can charge fast and stabilize lead battery with nominal value 12[V], 20[AH]. Also we propose the design procedure of the power control circuit for turn ratio of fly-back inductor and determining method of values such as the charging current, bulk current, partial current, over current value and fixed charging voltage. The experiment results for the voltage and current wave for partial, bulk, over and fixed charging period show the good charging effect and performance. And the PCB and internal coupling diagram of the switching mode conversion type pulse charger by fly-back converter method is presented.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 1999.05a
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• pp.179-184
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• 1999

A Timing Diagram is almost used to represent the various signals such as an address bus, a data bus, and the control signals during design and analysis of a digital system. But if so, its representation is somewhat complicated and also it is difficult to analyze the operation of the system. In this paper, we proposed the representation method of timing diagrams with the EMFG(Extended Mark Flow Graph). In the EMFG representation of the system operation, the logical states due to the various signals of the system is graphically represented. Therefore the proposal method allows that it is easy to design as well as analyze the system. As examples applied, we represented the memory read cycle of $\mu$PD70320 CPU and the read cycle of MCM60256A memory with the EMFG.

• Journal of the Korea Society for Simulation
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• v.3 no.1
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• pp.151-165
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• 1994

Broadband network based on the Asynchronous Transfer Mode(ATM) concept are becoming the target technology for the emerging Broadband Integrated Services Digital Network(B-ISDN). Since B-ISDN is very complex and requites a great amount of investment, optimum design and performance analysis of such systems are very important. Simulation can be widely used to analyze and examine the broadband network behavior. However, for the complicated system like broadband networks it is extremely difficult and time-consuming to develop a complete model for simulation. In this paper, an object-oriented modeling approach for the broadband network simulation is presented for the effective and efficient modeling. Object-oriented approaches can provide a good structuring capability for complicated simulation models and facilitate the development of reusable and extensible simulation models. We have developed an object-oriented model which consists of object model and behavior model. In the object mode., the components of the broadband network and both constant bit rate(CBR) and variable bit rate(VBR) traffic types of call level, burst level, and cell level are modeled as object classes. In the behavior model, the dynamic features for each object class are represented using the state transition diagram. It has been shown by illustration that objectoriented modeling is an effective tool for modeling the complicated B-ISDN.

• Journal of the Korea Institute of Military Science and Technology
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• v.15 no.1
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• pp.66-74
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• 2012

The virtual target signal generator was developed to verify the shipborne tracking radar performance. It was used to DRFM(Digital RF Memory) method to generate the virtual moving targets. The target signal includes Doppler shift and RCS according to the target motion. And the signal generator can make jamming signal and clutter to test shipborne radar performance at real environmental condition. This paper described the functional diagram and the hardware configuration items to meet the test requirements for the tracking radar. And it showed the critical design points for the sub-systems. The signal generator which was developed in this paper shared the operational information of the radar with the radar command and control part. To test the frequency agility of the radar, it had the local oscillator which could do high speed frequency switching according to radar information. By communicating between the signal generator and the radar command and control part, the local oscillator of signal generator could be controlled every pulse. It reduced the instantaneous bandwidth of signal generator and minimized the spurious. So it lowered the probability of generating wrong targets.

• Ocean and Polar Research
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• v.35 no.4
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• pp.291-298
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• 2013

In order to investigate the topography and exposure duration of the Siheung tidal flat, tidal ranges and DEM constructed by remote sensing techniques were analyzed. A cross-sectional diagram of the intertidal area reveals that it is relatively flat in the upper zone and then abruptly plunges into the bottom of the main channel where elevations increase in an upstream direction. The waterline during the Highest Low Water (HLW) is drawn back to the bottom of the channel at the middle part of the tidal flat and is formed along the slant of the channel during the Lowest High Water (LHW). The intertidal zone is located between -410 cm and 510 cm in terms of elevation and its total area is $0.65km^2$. An area between the Highest High Water (HHW) and Lowest High Water (LHW), occupying about 80% of the total area, occupies $0.52km^2$ of total area and accounts for 56% of the exposure duration. The boundary of wetland protection area in the Siheung tidal flat did not exactly coincide with the intertidal regime and differs by more than 15%. This study, which precisely analyzed the tidal flat area, tidal environment, and topography, would be useful in making a conservation plan and in learning how to use a wetland protection area in a sustainable manner.

• Progress in Superconductivity
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• v.6 no.2
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• pp.104-107
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• 2005

We have developed and tested an RSFQ 4-bit Arithmetic Logic Unit (ALU) based on half adder cells and de switches. ALU is a core element of a computer processor that performs arithmetic and logic operations on the operands in computer instruction words. The designed ALU had limited operation functions of OR, AND, XOR, and ADD. It had a pipeline structure. We have simulated the circuit by using Josephson circuit simulation tools in order to reduce the timing problem, and confirmed the correct operation of the designed ALU. We used simulation tools of $XIC^{TM},\;WRspice^{TM}$, and Julia. The fabricated 4-bit ALU circuit had a size of $\3000{\ cal}um{\times}1500{\cal}$, and the chip size was $5{\cal} mm{\times}5{\cal}mm$. The test speeds were 1000 kHz and 5 GHz. For high-speed test, we used an eye-diagram technique. Our 4-bit ALU operated correctly up to 5 GHz clock frequency. The chip was tested at the liquid-helium temperature.