• Title/Summary/Keyword: Digital Devices

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Improvement of Booting-time on Real-Time OS by cache for CE Devices (Real-Time OS의 CE 기기 적용시 Cache를 통한 Booting-Time 개선)

  • Kim, Kyung-Hoon;Ha, Seong-Ho;Park, Jeung-Hyung
    • Proceedings of the KIEE Conference
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    • 2004.11c
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    • pp.394-396
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    • 2004
  • CE 제품에 리얼타임 OS를 도입하면서, 제품의 조건을 만족시키기 위한 기술에 대해 많은 연구가 진행되고 있다. 특히, CE 제품에 있어서 중요한 이슈인 부팅 시간은 펌웨어수준과 비교했을 때 코드사이즈나 OS 초기화 과정 때문에 다소 느려지는 경향을 보이고 있다. 본 논문은 이러한 CE 제품의 부팅 시간에 초점을 맞추고 리얼타임 OS 적용시의 부팅 시간을 개선하였다. 구현에 사용된 ARM920T Core는 32-비트 RISC 구조이며, 각 16KB의 인스트럭션 Cache와 데이터 Cache, 그리고 MMU(Memory Management Unit)로 구성되어 있으며, 리얼타임 OS는 선점형 방식의 커널로 구성된 OS를 사용하였다.

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Design of FPGA Adaptive Filter for ECG Signal Preprocessing (FPGA를 이용한 심전도 전처리용 적응필터 설계)

  • 한상돈;전대근;이경중;윤형로
    • Journal of Biomedical Engineering Research
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    • v.22 no.3
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    • pp.285-291
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    • 2001
  • In this paper, we designed two preprocessing adaptive filter - high pass filter and notch filter - using FPGA. For minimizing the calculation load of multi-channel and high-resolution ECG system, we utilize FPGA rather than digital signal processing chip. To implement the designed filters in FPGA, we utilize FPGA design tool(Altera corporation, MAX-PLUS II) and CSE database as test data. In order to evaluate the performance in terms of processing time, we compared the designed filters with the digital filters implemented by ADSP21061(Analog Devices). As a result, the filters implemented by FPGA showed better performance than the filters based on ADSP21061. As a consequence of examination, we conclude that FPGA is a useful solution in multi-channel and high-resolution signal processing.

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A Review of Mobile Data Traffic Explosion according to Digital Convergence and Action Plans of Network Operator (디지털 컨버전스 활성화에 따른 모바일 데이터 트래픽 증가 현황에 대한 고찰 및 대응 방안 모색)

  • Park, Bok-Nyong;Moon, Tae-Hee;Kwack, Jun-Yeung;Kwon, June-Hyuk
    • Journal of The Institute of Information and Telecommunication Facilities Engineering
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    • v.9 no.4
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    • pp.131-140
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    • 2010
  • Recently, mobile wireless data traffic has been dramatically increased due to not only the popularization of digital convergence devices including smart phone, Net-book, and Tablet PC, but also the vitalization of wireless Internet related eco-systems such as AppStore. In addition, it is expected that a tremendous increase in mobile data is caused by the release of unlimited mobile data plans (flat-fee). In order to deal with such mobile data traffic explosion, it is necessary that network operators should make efforts to offload wireless data traffic. This paper reviews the condition of mobile wireless data traffic in domestic and international telecommunication industry and looks for various action plans to overcome the difficulty of network operators.

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The Prism Effect-based Creativity-Thinking Process: With 'Multi-Sensory,' 'Multi-Dimensional,' and 'Storytelling' Devices

  • Won Kyung-Ah
    • Archives of design research
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    • v.19 no.3 s.65
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    • pp.5-18
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    • 2006
  • Digital information society shows a variety of contents of cross-categorial digital media in their inner or outer forms and concepts of the artistic aspects. In order to cope with such a complicated, unexpected trend in digital media and its industry, a new approach in the design process needs to be developed and adjusted with the new equipment of the creativity-thinking process of 'the Multi-Sensory Device (MSD),' 'the Multi-Dimensional Device (MDD),' and 'the Storytelling Device (SD)' in the Prism Effect-based Creativity-Thinking Process (PECTP). The PECTP is in principle designed to practically work with the four distinct techniques: 1) Physical Activity, 2) Linguistic Activity, 3) Visual Activity, and 4) Complex Activity. Consequently, this thesis notes that the nature of the cross-categorial design contents is necessarily non-directional since the creativity power inside the Prism Effect results in openness and diversity.

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High-performance Digital Hearing Aid Processor Chip with Nonlinear Multiband Loudness Correction (비선형 다중채널 Loudness 교정을 위한 고성능 보청기 칩)

  • Park, Young-Cheol;Kim, Dong-Wook;Kim, Won-Ky;Park, Sang-Il
    • Proceedings of the KOSOMBE Conference
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    • v.1997 no.05
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    • pp.342-344
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    • 1997
  • Owing to technical advances in very large-scale integrated circuits (VLSI), high-speed digital signal processing (DSP) chips become fast enough to allow for real-time implementation of hearing aid algorithms in units small enough to be wearable. In this paper, we present a digital hearing aid processor (DHAP) chip built around a general-purpose 16-bit DSP core. The designed DHAP performs a nonlinear loudness correction of 8 octave frequency bands based on audiometric measurements. By employing a programmable DSP, the DHAP provides all the flexibility needed to implement audiological algorithms. In addition, the has a low power feature and $5.410\times5.720mm^2$ dimensions that fit for wearable devices.

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User Event Analyzer for Bidirectional DMB Data Service (양방향 DMB 서비스를 위한 사용자 이벤트 분석 모듈)

  • Li, Song-Lu;Khin, Hlaing Su;Kim, Sang-Wook
    • 한국HCI학회:학술대회논문집
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    • 2007.02a
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    • pp.624-629
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    • 2007
  • Digital Multimedia Broadcasting (DMB) is a digital radio transmission system for sending multimedia such as radio, TV, and data casting to mobile devices. Nowadays, DMB specifications are the major standard for digital broadcasting and have been establishing for bidirectional service using MPEG-4 system. But there has been only some simple demonstrated system for this bidirectional services. In this paper, we introduce bidirectional DMB data service system that provides the interaction between the user and DMB server without any additional equipment such as web server. The proposed bidirectional DMB system can capture and send user interaction information and response through the existing DMB transmission channel, finally update the original contents. The action event from the user is the most important thing in developing the bidirectional DMB system. Therefor, capturing the event data from the user is the first step we need to do for the bidirectional DMB service. In this paper, we propose an interaction manager module for the user events. This system will extract the user events and make a plan to update the original scene with the server's reaction information.

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Efficient Hybrid Carrier Based Space Vector Modulation for a Cascaded Multilevel Inverter

  • Govindaraju, C.;Baskaran, K.
    • Journal of Power Electronics
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    • v.10 no.3
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    • pp.277-284
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    • 2010
  • This paper presents a novel hybrid carrier based space vector modulation for cascaded multilevel inverters. The proposed technique inherits the properties of carrier based space vector modulation and the fundamental frequency modulation strategy. The main characteristic of this modulation are the reduction of power loss, and improved harmonic performance. The carrier based space vector modulation algorithm is implemented with a TMS320F2407 digital signal processor. A Xilinx Complex Programmable Logic Device is used to develop the hybrid PWM control algorithm and it is integrated with a digital signal processor for hybrid carrier based space vector PWM generation. The inverter offers less weighted total harmonic distortion and it operates with equal electrostatic and electromagnetic stress among the power devices. The feasibility of the proposed technique is verified by spectral analysis, simulation, and experimental results.

PWM Inverter Controller Design for UPS(Uninterruptible Power Supply) Using a DSP(TMS320F240) (DSP(TMS320F240)을 이용한 무정전 전원장치(UPS)용 PWM 인버터 제어기 설계)

  • Jang, J.Y.;Lee, J.P.;Choi, J.Y.;Choy, I.;Lee, S.C.;Yoo, J.Y.
    • Proceedings of the KIEE Conference
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    • 1999.07f
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    • pp.2587-2589
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    • 1999
  • In this paper, we propose a new control scheme for a PWM inverter using digital control. Digital control has various advantages in comparison with conventional analogue control. It can achieve high frequency switching of inverter and can be little influenced for temperature variations and aging of devices. This digitally-controlled PWM inverter is implemented using a Digital Signal Processor(DSPTMS320F240). The simulation results are given to verify the DSP based PWM inverter design and implementation.

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A Tool Pack Mechanism for DRM Interoperability

  • Choi, Bum-Suk;Byun, Young-Bae;Nam, Je-Ho;Hong, Jin-Woo
    • ETRI Journal
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    • v.29 no.4
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    • pp.539-541
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    • 2007
  • As the number of digital content service providers increases, a variety of digital rights management (DRM) systems appear without supporting interoperability. The lack of interoperability in DRM systems causes inconvenience to customers, especially when they want to play content through multiple devices manufactured by different vendors. In this letter, we propose a novel method to support interoperability between different DRM systems. The proposed technique aims to build an open framework structure which satisfies DRM vendors' requirements by enhancing the security of intellectual property management and the protection tools.

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Novel Digital Cancelation Method in Presence of Harmonic Self-Interference

  • Ju, Hyungsik;Gwak, Donghyuk;Lee, Yuro;Kim, Tae-Joong
    • ETRI Journal
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    • v.39 no.2
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    • pp.245-254
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    • 2017
  • In-band full-duplex (IFD) communication has recently attracted a great deal of interest because it potentially provides a two-fold spectral efficiency increase over half-duplex communications. In this paper, we propose a novel digital self-interference cancelation (DSIC) algorithm for an IFD communication system in which two nodes exchange orthogonal frequency-division multiplexing (OFDM) symbols. The proposed DSIC algorithm is based on the least-squares estimation of a self-interference (SI) channel with block processing of multiple OFDM symbols, in order to eliminate the fundamental and harmonic components of SI induced through the practical radio frequency devices of an IFD transceiver. In addition, the proposed DSIC algorithm adopts discrete Fourier transform processing of the estimated SI channel to further enhance its cancelation performance. We provide a minimum number of training symbols to estimate the SI channel effectively. The evaluation results show that our proposed DSIC algorithm outperforms a conventional algorithm.