• Title/Summary/Keyword: Decoder complexity

Search Result 350, Processing Time 0.022 seconds

Real-Time DSP Implementation of Adaptive Multi-Rate with TMS320C542 board (TMS320C542보드를 이용한 Adaptive Multi-Rate 음성부호화기의 실시간 구현)

  • 박세익;전라온;이인성
    • Proceedings of the IEEK Conference
    • /
    • 2000.09a
    • /
    • pp.827-830
    • /
    • 2000
  • 3GPP and ETSI adopted AMR(Adaptive Multi-Rate) as a standard for next generation IMT-2000 service. In this paper, we analyzed algorithm about AMR and optimized ANSI C source on the C complier and assembly language of Texas Instrument . The implemented AMR speech codec requires 28.2MIPS of complexity for encoder and 5.5MIPS for decoder. we performed real-time implementation of AMR speech codec using 82% of TMS320C5402 with 40 MIPS specification. We give proof that the output speech of the implemented speech codec on DSP board is identical with result of C source program simulation. Also the reconstructed speech is verified in the real-time environment consisted of microphone and speaker.

  • PDF

A Iterative-free Fractal Decoding Algorithm Based on Shared Initial Image (공유된 초기 영상에 기반한 무반복 프랙탈 복호 알고리즘)

  • 곽노윤;한군희
    • Proceedings of the Korea Contents Association Conference
    • /
    • 2003.11a
    • /
    • pp.328-332
    • /
    • 2003
  • Since Jacquine introduced the image coding algorithm using fractal theory, many fractal image compression algorithms providing good quality at low bit rate have been proposed by Fisher and Beaumount et al.. But a problem of the previous implementations is that the decoding rests on an iterative procedure whose complexity is image -dependent. This paper proposes an iterative-free fractal image decoding algorithm to reduce the decoding time. In the proposed method, under the encoder previously with the same codebook image as an initial image to be used at the decoder, the fractal coefficients are obtained through calculating the similarity between the codebook image and a input image to be encoded. As the decoding process can be completed with received fractal coefficients and predefined initial image without repeated iterations, the decoding time could be remarkably reduced.

  • PDF

Simplified MMSE Detection with SoIC for Iterative Receivers in Multiple Antenna Systems (다중 안테나 시스템에서 연 간섭 제거를 이용한 저 복잡도 MMSE 신호 검출 방법)

  • Kim, Jong-Kyung;Seo, Jong-Soo
    • Journal of Advanced Navigation Technology
    • /
    • v.13 no.3
    • /
    • pp.385-392
    • /
    • 2009
  • Simplified minimum mean square error (MMSE) detection technique combined with soft interference cancellation(SoIC) is proposed for iterative receivers in multiple antenna systems. To avoid repeated matrix inversions required to obtain the MMSE filter coefficients during the iteration between the soft detector and decoder, simplified matrix inversion techniques are applied to calculate the filter coefficient matrix. Simulation results show that the proposed MMSE detections with SoIC indicate a comparable or slightly degraded detection performance while achieving a significantly reduced complexity as compared to the conventional MMSE detection with SoIC.

  • PDF

Fast Decoding Method of Distributed Video Based on Modeling of Parity Bit Requests (패리티 비트 요구량 모델링에 의한 분산 비디오의 고속 복호화 기법)

  • Kim, Man-Jae;Kim, Jin-Soo
    • Journal of the Korea Institute of Information and Communication Engineering
    • /
    • v.16 no.11
    • /
    • pp.2465-2473
    • /
    • 2012
  • Recently, as one of low complexity video encoding methods, DVC (Distributed Video Coding) scheme has been actively studied. Most of DVC schemes exploit feedback channel to achieve better coding performances, however, this causes these schemes to have high decoding delay. In order to overcome these, this paper proposes a new fast DVC decoding method using parity-bit request model, which can be obtained by using bit-error rate, sent by encoder with motion vector, which is transmitted through feedback channel by decoder after generating side information. Through several simulations, it is shown that the proposed method improves greatly the decoding speed, compared to the conventional schemes.

Efficient Design of Structured LDPC Codes (구조적 LDPC 부호의 효율적인 설계)

  • Chung Bi-Woong;Kim Joon-Sung;Song Hong-Yeop
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.31 no.1C
    • /
    • pp.14-19
    • /
    • 2006
  • The high encoding complexity of LDPC codes can be solved by designing structured parity-check matrix. If the parity-check matrix of LDPC codes is composed of same type of blocks, decoder implementation can be simple, this structure allow structured decoding and required memory for storing the parity-check matrix can be reduced largely. In this parer, we propose a construction algorithm for short block length structured LDPC codes based on girth condition, PEG algorithm and variable node connectivity. The code designed by this algorithm shows similar performance to other codes without structured constraint in low SNR and better performance in high SNR than those by simulation

Erasure decoding strategies for RS product code reducing undetected error rate (검출 불능 오류율을 향상기키는 Reed-Solomon 적부호의 이레이져 복호방법)

  • 김정헌;염창열;송홍엽;강구호;김순태;백세현
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.26 no.4B
    • /
    • pp.427-436
    • /
    • 2001
  • RS product codes are widely used in digital storage systems. There are lots of decoding strategies for product code for short-length RS codes. Unfortunately many of them cannot be applied to long-length RS product codes because of the complexity of decoder. This paper proposes new decoding strategies which can be used in long length RS product codes.

  • PDF

Performance and Convergence Analysis of Tree-LDPC codes on the Min-Sum Iterative Decoding Algorithm (Min-Sum 반복 복호 알고리즘을 사용한 Tree-LDPC의 성능과 수렴 분석)

  • Noh Kwang-seok;Heo Jun;Chung Kyuhyuk
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.31 no.1C
    • /
    • pp.20-25
    • /
    • 2006
  • In this paper, the performance of Tree-LDPC code is presented based on the min-sum algorithm with scaling and the asymptotic performance in the water fall region is shown by density evolution. We presents that the Tree-LDPC code show a significant performance gain by scaling with the optimal scaling factor which is obtained by density evolution methods. We also show that the performance of min-sum with scaling is as good as the performance of sum-product while the decoding complexity of min-sum algorithm is much lower than that of sum-product algorithm. The Tree-LDPC decoder is implemented on a FPGA chip with a small interleaver size.

Performance of the Code Rate 1/2 Modulation Codes According to Minimum Distance on the Holographic Data Storage (홀로그래픽 데이터 저장장치에서 부호율 1/2인 이진 변조부호의 최소거리에 따른 성능 분석)

  • Jeong, Seongkwon;Lee, Jaejin
    • Journal of the Institute of Electronics and Information Engineers
    • /
    • v.52 no.10
    • /
    • pp.11-15
    • /
    • 2015
  • In this paper, we introduce three modulation codes of the code rate 1/2 with different minimum distances, respectively, and investigate the performance of the codes according to the minimum distance. We simulate the codes in accordance with blur and misalignment. As the minimum distance increases, the complexity of encoder and decoder also grows. However, it can improve the error correcting capability and shows good performance with blur and misalignment.

Performance of the Concatenated System of MTCM Codes with STBC on Fast Rayleigh Fading Channels (빠른 레일리 페이딩채널에서 MTCM 부호와 STBC를 결합한 시스템의 성능평가)

  • Jin, Ik-Soo
    • The Journal of The Korea Institute of Intelligent Transport Systems
    • /
    • v.8 no.6
    • /
    • pp.141-148
    • /
    • 2009
  • Space-time block codes (STBC) have no coding gain but they provide a full diversity gain with relatively low encoder/decoder complexity. Therefore, STBC should be concatenated with an outer code which provides an additional coding gain. In this paper, we consider the concatenation of multiple trellis-coded modulation (MTCM) codes with STBC for achieving significant coding gain with full antenna diversity. Using criteria of equal transmit power, spectral efficiency and the number of trellis states, the performance of concatenated scheme is compared to that of previously known space-time trellis codes (STTC) in terms of frame error rate (FER). Simulation results show that MTCM codes concatenated with STBC offer better performance on fast Rayleigh fading channels, than previously known STTC with two transmit antennas and one receive antenna.

  • PDF

Hybrid-ARQ protocols based on first-order reed-muller codes with soft decision detectors (연판정 검출기를 사용한 1차 reed-muller 부호에 근거한 복합 자동반복요구 프로토콜)

  • 황원택;김동인
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.21 no.5
    • /
    • pp.1256-1265
    • /
    • 1996
  • Soft-decision detectors are used in many FEC and ARQ schemes to enhance the bit-error-probability and system throughput. Also, the hybrid-ARQ protocol is a very efficient schemeto achieve overall performance improvement. In this paper, we propose a new hybrid-ARQ protocol based on the first-order Reed-Muller codes employing soft-decision detectors. The Reed-Muller codes have the virtue of being able to use the fast Green machine decoder that is simple to implement. As the performance measures, the bit-error-probability and system throughput are evaluted for the proposed hybrid-ARQ procol, and compared with those of other hybrid-ARQ schemes. It is shown that the use of the proposed hybrid-ARQ protocol results in significant performance improvement without causing much loss in view of system complexity.

  • PDF