• 제어로봇시스템학회:학술대회논문집
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• 2005.06a
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• pp.817-820
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• 2005

Dead-Time is necessary to prevent the shot circuit of the full bridge inverters in pulse width modulation. However the output voltage deviations is the result of the Dead-Time that decrease power from the out put voltage inverters. This paper presents the method that compensate power output voltage inverters loss in Dead-Time circuit for DC Motor Drives with full bridge voltage inverters. The compensation of Dead-Time method is a sample and a low-cost solution. The comparison between the test results and simulation by MATLAB&SIMULINK under the same condition is similar.

• Proceedings of the KIEE Conference
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• 1999.07b
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• pp.976-978
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• 1999

Recently PWM invertor is broadly used for control of induction motor. The invertor is able to generate sin wave current from high speed switching power device such as IGBT. However the invertor is disturbed by dead time inevitably needed to prevent a short of the DC link voltage, and the dead time mainly causes distortions of the output current. In this Paper the dead time compensation method which corrects the voltage error from dead time, and Min Max algorithm enlarging the operating voltage of PWM were Proposed. This method can be implemented by software programming without any additional hardware circuit. The proposed algorithms were implemented by DSP(TMS320C31, 40MHz) and FPGA(QL2007, Quick Logic) described in VHDL. and applied to 3 phase induction motor(2.2 KW) to show the superior performance

• Proceedings of the KIEE Conference
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• 1994.07a
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• pp.265-269
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• 1994

The switching dead time avoiding a bridge leg short circuit in PWM voltage source inverter produces distortions of the controlling inverter output performance such as current waveform, voltage vector, and torque. In this paper, the influence of dead time is investigated. The on-line space voltage vector modulation method is used for current controller. It is possible to compensate dead time by space voltage vector modulation which generates additional pulse compensating voltage distortion caused by dead time. In addition, narrow pulse which is generally neglected can be compensated. All the algorithms, including field-oriented control are performed by one chip microprocessor 80C196MC and DSP TMS320C31. Experimental results probe that the proposed scheme provides a good inverter output performance.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.39 no.3
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• pp.273-280
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• 1990

To prevent the shoot-through phenomena in a PWM inverter, a short dead time is usually provided between a pair of switching transistors in the same leg of the inverter. In this approach, the amount of the dead time is designed to meet the worst case condition of the inverter transistors and the base drive elements. So, in normal cases, relatively large portion of the dead time is unnecessary and it results in an undesirablecurrent waveform distortion and generates ripple torque on the motor shaft. In this paper, a new base drive method to remove the undesirable portion of the dead time is described. The method senses the transistor on/off states to interlock the other transistor of the leg without the external dead time. Also, for the transistors of large current rating, the Darlington drive circuit is combined to the proposed method and is tested to verify the effectiveness. The experimental results of the proposed method are described and compared with those of the conventional dead time method.

• Journal of Power Electronics
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• v.16 no.2
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• pp.425-435
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• 2016

This paper presents a comprehensive theoretical analysis and an accurate calculation method of the dead-time required to achieve zero-voltage-switching (ZVS) in a battery charger with the phase-shifted full-bridge (PSFB) topology. Compared to previous studies, this is the first time that the effects of nonlinear output filter inductance, varied Miller Plateau length, and blocking capacitors have been considered. It has been found that the output filter inductance and the Miller Plateau have a significant influence on the dead-time for ZVS when the load current varies a lot in battery charger applications. In addition, the blocking capacitor, which is widely used to prevent saturation, reduces the circulating current and consequently affects the setting of the dead-time. In consideration of these effects, accurate analytical equations of the dead-time range for ZVS are deduced. Experimental results from a 1.5kW PSFB battery charger prototype shows that, with the proposed analysis, an optimal dead-time can be selected to meet the specific requirements of a system while achieving ZVS over wide load range.

• The Transactions of the Korean Institute of Power Electronics
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• v.17 no.5
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• pp.409-415
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• 2012

This paper presents a new software-based on-line dead-time compensation technique for a single-phase grid-connected photovoltaic (PV) inverter system. To prevent a short circuit in the inverter arms, a switching delay time must be inserted in the pulse width modulation (PWM) signals. This causes the dead-time effect, which degrades the system performance around zero-crossing point of the output current. To reduce the dead-time effect around the zero-crossing point of grid current, a harmonic mitigation of grid current is used as an additional part of the synchronous frame current control scheme. This additional task mitigates the harmonic components caused by the dead-time from the grid current. Simulation and experimental results are shown to verify the effectiveness of the proposed dead-time compensation method in the single-phase grid-connected inverter system.

• The Transactions of the Korean Institute of Power Electronics
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• v.22 no.2
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• pp.166-174
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• 2017

This study proposes a compensation method for the dead-time effects on a single-phase grid-connected inverter. Dead time should be considered in the pulse-width modulation gating signals to prevent the simultaneous conduction of switching devices, considering that a switching device has a finite switching time. Consequently, the output current of the grid-connected inverter contains odd-numbered harmonics because of the dead time and the nonlinear characteristics of the switching devices. The effects of dead time on output voltage and current are analyzed in this study. A new compensation algorithm based on second-order generalized integrator is also proposed to reduce the dead-time effect. Simulation and experimental results validate the effectiveness of the proposed compensation algorithm.

• 제어로봇시스템학회:학술대회논문집
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• 2000.10a
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• pp.319-319
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• 2000

In this paper, A dead-time compensator (DTC) for the processes with long dead-time is proposed. The processes which consist of dead-time, time-constant, gain are estimated by the linear least squares method in the frequency domain. A Smith predictor(SP) modified by including a filter becomes a two degree of freedom DTC. So the proposed DTC can yield the desirable setpoint and load disturbance responses separately. PI controller is used for the primary controller and the filter is tuned to be robust. Simulation examples demonstrate the properties of the proposed DTC.

• Journal of Power Electronics
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• v.14 no.2
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• pp.249-256
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• 2014

A novel topology generation method for the no dead-time three-phase AC/DC converter is proposed in this study. With this method, a series of no dead time topologies are generated and their operation principles are analyzed. The classic three-phase bridge AC/DC converter can realize a bidirectional operation. However, dead-time should be inserted in the driving signals to avoid the shoot-through problem, which would cause additional harmonics. Compared with the bridge topology, the proposed topologies lack the shoot-through problem. Thus, dead time can be avoided. All of the no dead time three-phase AC/DC converters can realize bidirectional operation. The operating principles of the converters are analyzed in detail, and the corresponding control strategies are discussed. Comparisons of waveform distortion and efficiency among the converters are provided. Finally, 9 KW DSP-based principle prototypes are established and tested. Simulation and experimental results verify the theoretical analysis.

• The Transactions of the Korean Institute of Power Electronics
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• v.16 no.6
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• pp.610-617
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• 2011

This paper proposes a novel and direct dead-time compensation method of the 3-phase inverter using space vector pulse width modulation(SVPWM) topology. The proposed dead-time compensation method directly compensates the dead-time to the turn-on time of the effective voltage vector according to the current direction of the medium voltage reference. Each phase voltages are determined by the switching times of the effective voltage vectors, and the practical switching times have loss according to the current direction by the dead-time effect in the 3-phase inverter. The proposed method adds the dead-time to the switching time of the effective voltage vector according to the current direction, so it does not require complex d-q transform and controller to compensate the voltage error. The proposed dead-time compensation scheme is verified by the computer simulation and experiments of 3-phase R-L load.