• The Transactions of the Korean Institute of Power Electronics
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• v.9 no.2
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• pp.158-162
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• 2004

The magnetic levitator is the device which can float a magnetic material at the midair by electromagnetic force and it's principle can be applied to the high speed magnetic bearing or magnetic levitation train. There are many difficulties to control, because the magnetic levitator is basically a nonlinear and unstable system. In this paper, this system is modeled assuming that it is a linear system nearby an operating point, and a proportional and derivative(PD) position controller is designed to carry out the variable position control. The performance of position control response is shown through simulation and experiment. A prototype magnetic levitator is constructed using PWM converter and DSP(Digital Signal Processor) based control board.

• Journal of Satellite, Information and Communications
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• v.11 no.2
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• pp.14-17
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• 2016

This paper describes the implementation of automatic number-braille converter based on image processing for the blind people. The algorithm is consists of four main steps. First step is binary image conversion of the input image obtained by the camera. the second step is segmentation operation by means of dilation and labelling of the character. Next step is calculation of cross-correlation between segmented text image and pre-defined text-pattern image. The final step is generation of brail output which is relevant to input image. The computer simulation result was showing 91.8% correct conversion rate for arabian numbers which is printed in A4-sheet and practical possibility was also confirmed by using implemented automatic number-braille converter based on DSP image processing board.

• The Journal of the Acoustical Society of Korea
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• v.17 no.4
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• pp.14-22
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• 1998

본 연구에서는 Texas Instruments 사의 저가형 부동소수점 디지털 신호 처리기 (Digital Singnal Processor, DSP)인 TMS320C32를 이용하여 실시간 화자종속 음성인식 하 드웨어 모듈(VR32)을 개발하였다. 하드웨어 모듈의 구성은 40MHz의 TMS320C32 DSP, 14bit 코덱인 TLC32044(또는 8bit μ-law PCM 코덱), EPROM과 SRAM 등의 메모리와 호 스트 인터페이스를 위한 로직 회로로 이루어졌다. 뿐만 아니라 이 하드웨어 모듈을 PC사에 서 평가해보기 위한 PC 인터페이스용 보드 및 소프트웨어도 개발하였다. 음성인식 알고리 즘의 구성은 에너지와 ZCR을 기반으로 한 끝점검출(Endpoint Detection) 침 10차 가중 LPC 켑스터럼(Weighted LPC Cepstrum) 분석이 실시간으로 이루어지며 이후 Dynamic Time Warping(DTW)를 통하여 최고 유사 단어를 결정하고 다시 검증과정을 거쳐 최종 인식을 수행한다. 끝점검출의 경우 적응 문턱값(Adaptive threshold)을 이용하여 잡음에 강인한 끝 점검출이 가능하며 DTW 알고리즘의 경우 C 및 어셈블리를 이용한 최적화를 통하여 계산 속도를 대폭 개선하였다. 현재 인식률은 일반 사무실 환경에서 통상 단축다이얼 용도로 사 용할 수 있는 30 단어에 대하여 95% 이상으로 매우 높은 편이며, 특히 배경음악이나 자동 차 소음과 같은 잡음환경에서도 잘 동작한다.

• Journal of Korea Multimedia Society
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• v.10 no.1
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• pp.66-73
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• 2007

SDR technology is a fundamental wireless access technology that combines and accommodates multiple wireless communication standards in one transceiver system through just modifying software using modular communication platforms without any hardware modifications for RF and IF signal processing on the basis of high performance DSP devices. Various communication systems that are designed under diverse and complex network environments require the communication platforms on the basis of SDR supporting reorganization to guarantee simple and fast communication interfaces among the respective wireless networks. This paper introduces a main idea on the implementation of platform on the basis of SDR and a communication platform is designed for experiments that is composed of a DSP board with TMS320C6713 CPU, a FPGA board processing IF signals, and a module with RF transceiver processing wireless LAN frequency bandwidth. Various modulation schemes(BPSK, QPSK, and 16QAM) used in communication systems are applied and tested on the designed platform and the test results shows that it is possible to design a reconfigurable communication terminal platform.

• Journal of Broadcast Engineering
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• v.16 no.6
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• pp.1018-1025
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• 2011

Scalable Video Coding (SVC) extension of H.264/AVC is a new video coding standard for media convergence by providing diverse videos of different spatial-temporal-quality layers with a single bitstream. Recently, real-time SVC codecs are being developed for the application areas of surveillance video and mobile video, etc. This paper presents the design and implementation of a H.264/SVC decoder based on an embedded DSP using Open SVC Decoder (OSD) which is a real-time software decoder designed for the PC environment. The implementation consists of porting C code of the OSD software from PC to DSP environment, profiling the complexity performance of OSD with further optimization, and integrating the optimized decoder into the TI Davinci EVM (Evaluation Module). 50 QCIF/CIF frames or 15 SD frames per second can be decoded with the implemented DSP-based SVC decoder.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.21 no.5
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• pp.11-18
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• 2021

The small radio frequency tracking radar is a tracking system with a radio frequency sensor that identifies a target through all-weather radio frequency signal processing for a target and searches, detects and tracks the target for the major target. In this paper, we describe the development of a board equipped with TMS320C6678 and XILINX FPGA (Field Programmable Gate Array), a high-speed multi-core DSP that acquires target information through all-weather radio frequency and identifies a target through real-time signal processing. We propose DSP-FPGA combination architecture for DSP and FPGA selection and signal processing, and also explain the design of SRIO for high-speed data transmission.

• Journal of the Korean Institute of Telematics and Electronics S
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• v.35S no.10
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• pp.19-26
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• 1998

In this paper, we studied the design and implementation of fading compensation systems at aspects of narrowband mobile communication using TTIB SSB. The mobile radio channel with multipath fading places fundamental limitations on the performance of wireless communication systems. The multipath fading is compensated using pilot tone in TTIB SSB. The TTIB transceiver was implemented using the prevailing digital signal processing (DSP) techniques and compensation for the multipath fading was incorporated in the receiver in the form of DSP algorithm. In order to evaluate fading compensation performance in TTIB transceiver, we first used computer simulation. In the simulation results, we found that the TTIB transceiver could compensate for the multipath fading as expected. Second, we carried out some experiments on TTIB transceiver implementation with DSP boards and later with hardwares including RF circuits with center frequency of 145MHz. Through these experiments, we found that fading compensation performance in TTIB transceiver was almost as good as that obtained from simulation.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.22 no.5
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• pp.1045-1057
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• 1997

In this paper, we propose an algorithm of block synchronization that uses data withoug synchronization preambles. Block synchronization systems is implemented using the DSP chip employing the proposed algorithm. The data spread of the DFT blocks is proportional to the offset of DFT block and this information is used to achieve the block synchronization in the receiver. The initial bleock synchronization and the clock synchronization between transmitter and receiver are achieved using the early-late removal of the guard interval. The hardware implmentation is carried out using the DSP chip TM320C30 to verify the proposed block synchronization algorithm with the data rate 1200bps. The DSP chip calculates the spread of the 128 complex FFT in the receiver with the system clock 30MHz. It is believed that the proposed synchronization algorithm can be used in the design of OFDM block synchronization with the high processing DSP chip.

• Proceedings of the KIPE Conference
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• 2003.07a
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• pp.186-188
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• 2003

본 논문은 계통상의 사고나 다양한 전력변환 장치들의 사용증가로 인한 전력품질의 저하의 계측과 분석에 관한 연구이다. DSP 프로세서를 사용하여 전력품질을 분석하며 분석된 data는 특정 서버에서 관리할 수 있도록 모니터링 전용 프로그램을 구성하여 일정기간 동안의 전력품질을 분석한다. 계측센서를 이용한 data를 제작된 DSP 보드를 통해 실효값으로 계산하고, 전력품질 Indices와 비교 분석하여 특정 서버에 저장하고, 전력품질 저하 대책을 위한 분석 자료로써 활용한다.

• Journal of the Korean Institute of Telematics and Electronics
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• v.27 no.5
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• pp.802-807
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• 1990

In this thesis, we represent the study on the design and implementation of the hangul graphic board which generate bit map font data from the boundary information of korean or chines fonts. The implemented graphic board consists of a TMS34010 Graphic System Processor (GSP) and two TMS320C25 Digital Signal Processor (DSP), and there is shared memory which consists of two memory blocks with same address for which is possible parallel processing between two processors. And in using DSP, we propose an efficient algorithm for calculation of Bezier curve which require much times to calculate bit map data font from the boundary information.