• Proceedings of the KIEE Conference
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• 1999.07g
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• pp.3199-3201
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• 1999

Convolutional coding with Viterbi decoding is known as a powerful method for forward error correction among many kinds of channel coding methods. This paper presents a soft decision Viterbi decoder which has systolic array trace-back architecture[1]. Soft decision is known as more effective method than hard decision and most of digital communication systems use soft decision. The advantage of using a systolic array decoder is that the trace-back operation can be accomplished continuously in an array of registers in a pipe-line fashion, instead of waiting for the entire trace-back procedure to be completed at each iteration. Therefore it may be suitable for faster communication system. We described operations of each module of the decoder and showed results of the logic synthesis and functional simulation.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.52 no.2
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• pp.85-90
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• 2003

This paper has presented the efficient implementation of MPEG-4 simple profile video decoder, which is used as video compression standard in mobile video communication. We have used the ARM9 processor in implementing this MPEG-4 simple profile, which requires much processing power and low power implementation. At first we implemented with C-language under the PC environment with ADS(ARM Developer Suite) environment, and then we have tried to reduce a clock cycle for a power consumption optimization through conversion an assembly language for C-code partly. We have verified the processor is operated at 22.47MHz operation after optimization, but 148MHz before optimization.

• Journal of information and communication convergence engineering
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• v.3 no.2
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• pp.76-79
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• 2005

In this paper, a low-complexity maximum-likelihood (ML) decoder based on QR decomposition, called real-valued LCMLDec decoder or RVLCMLDec for short, is proposed for the Vertical Bell Labs Layered Space-Time (V-BLAST) architecture, a promising candidate for providing high data rates in future fixed wireless communication systems [1]. Computer simulations, in comparison with other detection techniques, show that the proposed decoder is capable of providing the V­BLAST schemes with ML performance at low detection complexity

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2006.05a
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• pp.107-110
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• 2006

This work presents a low complexity maximum-likelihood decoder for signal detection in VBLAST-STBC system, which employs non-square O-STBC code rate 3/4. By stacking received symbols from different received symbolduration and applying QR decomposition resulting the special format of upper triangular matrix R, the proposed decoder is able to provide not only ML-like BER performance but also very low computational load. The low computational load and ML-like BER performance properties of the proposed decoder are verified by computer simulations.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.12 no.12
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• pp.2286-2292
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• 2008

In this paper, we design a RS(23,17) decoder for MB-OFDM(Multiband-Orthogonal Frequency Division Multiplexing) system, in which Modified Euclidean(ME) algorithm is adopted for key equation solver block. The proposed decoder has been optimized for MB-OFDM system so that it has less latency and hardware complexity. Additionally, we have implemented the proposed decoder using Verilog HDL and synthesized with Samsung 65nm library. From synthesis results, it can operate at clock frequency of 250MHz, and gate count is 20,710.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.30 no.5A
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• pp.359-369
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• 2005

For large capacity optical CDMA networks, we propose a shared-type encoder/decoders based on an tunable wavelength converter(TWC) and an arrayed waveguide grating (AWG) router. The proposed encoder/decoder treats codewords of wavelength/time 2-D code simultaneously using the dynamic code allocation property of the TWC and the cyclic property of the AWG router, and multiple subscribers can share the encoder/decoder in networks. Feasibility of the structure of the proposed encoder/decoder for dynamic code allocation is tested through simulations using two wavelength/time 2-D codes, which are the generalized multi-wavelength prime code(GMWPC) and the generalized multi-wavelength Reed-Solomon code(GMWRSC). Test results show that the proposed encoder/decoder can increase the channel efficiency not only by increasing the number of simultaneous users without any multiple-access interference but by using a relatively short length CDMA codes.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.14 no.4
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• pp.1689-1703
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• 2020

When data is transmitted over an unreliable channel, the error of the data packet may result in serious degradation. The multiple description coding (MDC) can solve this problem and save transmission costs. In this paper, we propose a deep multiple description coding network (MDCN) to realize efficient image compression. Firstly, our network framework is based on convolutional auto-encoder (CAE), which include multiple description encoder network (MDEN) and multiple description decoder network (MDDN). Secondly, in order to obtain high-quality reconstructed images at low bit rates, the encoding network and decoding network are integrated into an end-to-end compression framework. Thirdly, the multiple description decoder network includes side decoder network and central decoder network. When the decoder receives only one of the two multiple description code streams, side decoder network is used to obtain side reconstructed image of acceptable quality. When two descriptions are received, the high quality reconstructed image is obtained. In addition, instead of quantization with additive uniform noise, and SSIM loss and distance loss combine to train multiple description encoder networks to ensure that they can share structural information. Experimental results show that the proposed framework performs better than traditional multiple description coding methods.

• The KIPS Transactions:PartA
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• v.11A no.1
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• pp.81-88
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• 2004

In this paper, we designed the outer encoder/decoder for the terrestrial DMB that is an advanced digital broadcasting standard, implemented, and verified by using ALTERA FPGA. In the encoder part, it was created the parity bytes (16 bytes) from the input packet (188by1e) of MPEG-2 TS and the encoded data was distributed output by the convolutional interleaver for Preventing burst errors. In the decoder part, It was proposed the algorithm that detects synchronous character suitable to DMB in transmitted data from the encoder. The circuit complexity in RS decoder was reduced by applying a modified Euclid's algorithm. This system has a capability to correct error of the maximum 8 bytes in a packet. After the outer encoder/decoder algorithm was verified by using C language, described in VHDL and implemented in the ALTERA FPGA chips.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.21 no.3
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• pp.568-577
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• 2017

IEEE Std 1609.2 was defined for the support of communication security functions in the WAVE (Wireless Access in Vehicular Environments) system. IEEE Std 1609.2 defined the message structures of the security services and managements on the vehicular communication by using ASN.1 (Abstract Syntax Notation One). Also, this security message structures shall be encoded using the COER (Canonical Octet Encoding Rules). In this paper, we designed and implemented the IEEE Std 1609.2 message encoder/decoder handling the security messages defined in IEEE Std 1609.2. The designed encoder/decoder consists of three modules as follows : a module generating the message of C language data structures in accord with IEEE Std 1609.2 message structures, a message encoder module, a message decoder module. And the encoder/decoder was implemented on the Linux environment. Also we analyzed the performance by measuring the performance speed of the encoder/decoder implemented.

• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.5
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• pp.11-19
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• 2014

In this paper, a low complexity parallel sphere decoder algorithm is proposed for high-order MIMO system. It reduces the computational complexity compared to the fixed-complexity sphere decoder (FSD) algorithm by static tree-pruning and dynamic tree-pruning using scalable node operators, and offers near-maximum likelihood decoding performance. Moreover, it also offers hardware-friendly node operation algorithm through fixing the variable computational complexity caused by the sequential nature of the conventional SD algorithm. A Monte Carlo simulation shows our proposed algorithm decreases the average number of expanded nodes by 55% with only 6.3% increase of the normalized decoding time compared to a full parallelized FSD algorithm for high-order MIMO communication system with 16 QAM modulation.