• The Transactions of the Korean Institute of Electrical Engineers B
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• v.48 no.12
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• pp.691-700
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• 1999

This paper proposes a novel switching strategy of 1Mvar STATCON using cascade multilevel H-bridge inverter(HBI) for FACTS application. To control the reactive power instantaneously, the d-q dynamic system model is described and analyzed. A single pulse pattern based on the SHEM(Selective Harmonic Elimination Method) technique is determined from the look-up table to reduce the line current harmonics and a rotating fundamental frequency switching scheme is presented to adjust the DC voltage of each inverter capacitor at the same value. So the voltage unbalance problem between separately DC bus voltage is improved by using the proposed switching scheme. As a result, the presented inverter configuration not only reduces the system complexity by eliminating the isolation at the AC input side transformer but also improves the dynamic response to the step change of reactive power.

• The Transactions of the Korean Institute of Power Electronics
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• v.12 no.5
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• pp.400-408
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• 2007

In this paper, development of the 8kW parallel module converter is presented. For a effective configuration of FB-PWM converter, this paper proposes 4-parallel operation of 2 kw-module. FB converter of 2-kW module is controlled by phase shut PWM and in order to achieve ZVZCS, the simple auxiliary circuit is applied in secondary side. In order to achieve ZCS, control logic for auxiliary circuit operation is designed to reset the primary current during free-wheeling period. For output current sharing of 4-modules, the charge control is employed. The charge control logic is designed with phase shift PWM logic. Voltage controller is implemented by using DSP(TMS320LF2406) with A/D conversion data of the output current and voltage of each module. The developed converter is installed in PCU(Power Conditioning Unit) for HSG(High Speed Generator) in a vehicle and health monitoring system is implemented for vehicle operation test. Finally, performance of the developed converter is proved under practical operation of HSG.

• Journal of Power Electronics
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• v.19 no.4
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• pp.881-893
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• 2019

This paper proposes a practical sliding-mode controller design for shaping the impedances of cascaded boost-converter power decoupling circuits for reducing the second order harmonic ripple in photovoltaic (PV) current. The cascaded double-boost converter, when used as power decoupling circuit, has some advantages in terms of a high step-up voltage-ratio, a small number of switches and a better efficiency when compared to conventional topologies. From these features, it can be seen that this topology is suitable for residential (PV) rooftop systems. However, a robust controller design capable of rejecting double frequency inverter ripple from passing to the (PV) source is a challenge. The design constraints are related to the principle of the impedance-shaping technique to maximize the output impedance of the input-side boost converter, to block the double frequency PV current ripple component, and to prevent it from passing to the source without degrading the system dynamic responses. The design has a small recovery time in the presence of transients with a low overshoot or undershoot. Moreover, the proposed controller ensures that the ripple component swings freely within a voltage-gap between the (PV) and the DC-link voltages by the small capacitance of the auxiliary DC-link for electrolytic-capacitor elimination. The second boost controls the main DC-link voltage tightly within a satisfactory ripple range. The inverter controller performs maximum power point tracking (MPPT) for the input voltage source using ripple correlation control (RCC). The robustness of the proposed control was verified by varying system parameters under different load conditions. Finally, the proposed controller was verified by simulation and experimental results.

• Journal of Power Electronics
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• v.11 no.4
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• pp.568-575
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• 2011

This paper proposes an application of energy storage devices (ESD) for low-voltage ride-through (LVRT) capability enhancement and power smoothening of doubly-fed induction generator (DFIG) wind turbine systems. A grid-side converter (GSC) is used to maintain the DC-link voltage. Meanwhile, a machine-side converter (MSC) is used to control the active and reactive powers independently. For grid disturbances, the generator output power can be reduced by increasing the generator speed, resulting in an increased inertial energy of the rotational body. Design and control techniques for the energy storage devices are introduced, which consist of current and power control loops. Also, the output power fluctuation of the generator due to wind speed variations can be smoothened by controlling the ESD. The validity of the proposed method has been verified by PSCAD/EMTDC simulation results for a 2 MW DFIG wind turbine system and by experimental results for a small-scale wind turbine simulator.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.5
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• pp.71-79
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• 2010

This paper presents a design of a LLC resonant controller IC. LLC resonant controller IC controls the voltage of the 2nd side by adjusting frequency the input frequency of the external resonant circuit. The clock generator is integrated to provide the pulse to the resonant circuit and its frequency is controlled by the external resistor. Also, the frequency of the VCO is adjusted by the feedback voltage. The protection circuits such as UVLO(Under Voltage Lock Out), brown out, fault detector are implemented for the reliable and stable operation. The HVG, and LVG drivers can provide the high current and voltage to the IGBT. The designed LLC resonant controller IC is fabricated with the 0.35 um 2P3M BCD process. The overall die size is $1400um{\times}1450um$, and supply voltage is 5V, 15V.

• Journal of Power Electronics
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• v.18 no.6
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• pp.1642-1649
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• 2018

A single-stage flyback LED AC-DC converter based on primary-side control under constant current mode is proposed in this study. The proposed converter features low total harmonic distortion (THD) and high power factor (PF). It also consists of a zero-crossing distortion compensation circuit and a variable duty ratio control compensation circuit to deal with the line current distortions caused by fixed duty ratio control. The system model and layout are built in Simplis and Cadence, respectively. The feasibility and performance of the proposed circuit is verified by designing and fabricating an IC controller in the HHNEC $0.35{\mu}m$ 5 V/40 V HVCMOS process. Experimental results show that the PF can reach a level in the range of 0.985-0.9965. Moreover, the average THD of the entire system is approximately 10%, with the minimum being 6.305%, as the input line voltage changes from 85 VAC to 265 VAC.

• Journal of Power Electronics
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• v.17 no.1
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• pp.242-252
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• 2017

This paper deals with the blocking of DC-fault current during DC cable short-circuit conditions in HVDC (High-Voltage DC) transmission systems utilizing Modular Multilevel Converters (MMCs), where a new SubModule (SM) topology circuit for the MMC is proposed. In this SM circuit, an additional Insulated-Gate Bipolar Translator (IGBT) is required to be connected at the output terminal of a conventional SM with a half-bridge structure, hereafter referred to as HBSM, where the anti-parallel diodes of additional IGBTs are used to block current from the grid to the DC-link side. Compared with the existing MMCs based on full-bridge (FB) SMs, the hybrid topologies of HBSM and FBSM, and the clamp-double SMs, the proposed topology offers a lower cost and lower power loss while the fault current blocking capability in the DC short-circuit conditions is still provided. The effectiveness of the proposed topology has been validated by simulation results obtained from a 300-kV 300-MW HVDC transmission system and experimental results from a down-scaled HVDC system in the laboratory.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.18 no.3
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• pp.34-39
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• 2004

This research investigated the influence on the 4 cell of DC discharge on the side of the discharge characteristic. This DC discharge cells are that composes AND gate of AND gate PDP newly proposed. As for the discharge starting voltage of this discharge cell of 4 pieces, it has been understood that there is deeply a relation up to the space charge generated from the discharge of adjoining discharge cell through the experiment. The discharge voltages which had become each discharge cell optimizations from the experiment result were decided. Moreover, the width of the margin of two AND input voltages is wide and the AND function occurs clearly. However, it has been qualitatively understood that it is difficult enough to obtain the operation margin of the DC priming discharge used to address discharge of PDP.

• Journal of Power Electronics
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• v.12 no.2
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• pp.249-257
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• 2012

An interleaved PWM converter is proposed to implement the features of zero voltage switching (ZVS), load current sharing and ripple current reduction. The proposed converter includes two ZVS converters with a common clamp capacitor. With the shared capacitor, the charge balance of the two interleaved parts is automatically regulated under input voltage and load variations. The active-clamping circuit is used to realize the ZVS turn-on so that the switching losses on the power switches are reduced. The ZVS turn-on of all of the switching devices is achieved during the transition interval. The interleaved pulse-width modulation (PWM) operation will reduce the ripple current and the size of the input and output capacitors. The current double rectifier (CDR) is adopted in the secondary side to reduce output ripple current so that the sizes of the output chokes and capacitor are reduced. The circuit configuration, operation principles and design considerations are presented. Finally experimental results based on a 408W (24V/17A) prototype are provided to verify the effectiveness of the proposed converter.

• Journal of the Korean Society for Railway
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• v.19 no.3
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• pp.297-303
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• 2016

This paper introduces auxiliary power supply systems (APS) for railroad applications and proposes a new power conversion structure for highly-efficient and lightweight APS systems. The proposed structure focuses on an improvement of the power density in APS. It eliminates unnecessary power conversion stages in the conventional APS structure by modulating the dc/dc converter circuit and the structure of the system. The dc/dc converter circuit used in the proposed structure is based on a multi-level half-bridge converter, a widely used topology in railroad APS applications; a flying capacitor is newly added to the conventional circuit. The added capacitor is used not only to enhance the soft switching condition of the switches, but also so that the new pantograph will have a side voltage source of a battery charger in the APS structure. Since the battery charger uses the pantograph side voltage source in the proposed structure, rather than using the output of the main dc/dc converter in the conventional structure, the size and efficiency of the main dc/dc converter are reduced and increased, respectively. To verify the effectiveness of the proposed structure, simulation results will be presented with metropolitan transit APS specifications.