• Proceedings of the KIPE Conference
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• 2015.07a
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• pp.419-420
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• 2015

In this paper, a low-cost single-phase PWM rectifier with small DC-link capacitors is proposed, where a buck-boost converter with a low power rating is added at the DC link. By controlling the auxiliary circuit so as to absorb the voltage ripple in the DC link, the second-order voltage ripple in DC-link capacitor can be reduced significantly. Therefore, a small film capacitor can be utilized to replace the bulky electrolytic capacitors. The simulation results are shown to verify the validity of the proposed method.

• Proceedings of the KIPE Conference
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• 2000.07a
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• pp.325-329
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• 2000

An effective Carrier-Based PWM scheme that enables the instantaneous quality of each branch point voltage of a diode clamped 4-level inverter to be reduced at a low modulation index is described. This scheme presents a computed zero sequence voltage of PWM by the feedback of both DC-link voltages and load currents. The proposed PWM scheme enables to increase the controllable region of DC-link voltage and makes it possible to operate with small DC-link capacitors. The validity of the proposed PWM scheme is verified by simulation results.

• Journal of Power Electronics
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• v.18 no.4
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• pp.1067-1074
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• 2018

This paper presents a control method for variable-speed motor drives that do not use a DC-link electrolytic capacitor. The proposed circuit consists of a power factor correction converter for boosting the DC-link voltage, an inverter for driving the motor, and a small DC-link film capacitor. By employing a small DC-link capacitor, the proposed circuit that is small, and a low cost and weight are achieved. However, because the DC-link voltage varies periodically, the control of the circuit is more difficult than that of the conventional method. Using the proposed control method, an inverter can be controlled reliably even when the capacitance of the DC-link capacitor is very small. Experiments are performed using a 1.5-kW inverter with a $20-{\mu}F$ DC-link capacitor, and the experimental results are analyzed thoroughly.

• Proceedings of the KIPE Conference
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• 2004.07a
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• pp.346-349
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• 2004

The design of DC-DC converters for power electronic interfaces in power management systems for Hybrid Electric Vehicle (HEV) is a very challenging task. In this paper, the considered topology is the hi-directional buck-boost converter and inverter system. If we make the converter side DC link current the same as the inverter side DC link current in a converter-inverter system, no current will flow through the BC link capacitor and as a result, no DC link voltage variation occurs. This leads to the possibility of reducing small th size of DC link capacitors which are expensive, bulky. Therefore we propose the converter current controller which can manage to match inverter and converter current at the DC link.

• Journal of Power Electronics
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• v.17 no.4
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• pp.1004-1013
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• 2017

This paper presents an interleaving scheme for parallel-connected power systems to reduce the DC-link current ripple. A paralleled generator system generates current ripple by the Pulse Width Modulation (PWM) of each generator side converter. The current ripple in the DC-link degrades the efficiency of the whole generator system and decreases the lifetime of the DC-link capacitors. To mitigate these issues, the expression of the DC-link current is derived by a double-integral Fourier analysis while considering the modulation schemes. Optimized interleaving angles for the parallel generator system are obtained based on an analysis to minimize the dominant current harmonics component. Finally, the proposed interleaving scheme reduces the RMS value of the DC-link current ripple. Simulation and experimental results verify the effectiveness of the proposed interleaving scheme.

• Journal of the Korean Society of Industry Convergence
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• v.25 no.1
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• pp.47-53
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• 2022

This paper proposes a method for selecting the capacitance of DC-link capacitors of inverters. In general, the DC-link capacitance of the inverter system must be considered for DC-link voltage, ripple current, switching frequency, ripple voltage, and pulse-width modulation techniques. Therefore, the appropriate capacitance can be determined by finding the rms and peak values of the ripple current of the capacitor. In this paper, the process of extracting the ripple current of DC-link capacitor is described in detail. In addition, the simple method for finding DC-link capacitor capacitance using the result value is presented through the simulations.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.66 no.4
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• pp.213-218
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• 2017

The DC electrolytic capacitor for DC-link of power converter is widely used in various power electronic circuits and system application. Its functions include, DC Bus voltage stabilization, conduction of ripple current due to switching events, voltage smoothing, etc. Unfortunately, DC electrolytic capacitors are some of the weakest components in power electronics converters. Many papers have proposed different algorithms or diagnosis method to determinate the ESR and tan ${\delta}$ capacitance C for fault alarm system of the electrolytic capacitor. However, both ESR vary with frequency and temperature. Accurate knowledge of both parameters at the capacitors operating conditions is essential to achieve the best reference data of fault alarm. According to parameter analysis, the capacitance increases with temperature and the initial ESR decreases. Higher frequencies make the reference ESR with the initial ESRo value to decrease. Analysis results show that the proposed DC Bus electrolytic capacitor reference ESR model setting technique can be applied to advanced reference signal of capacitor diagnosis systems successfully.

• The Transactions of the Korean Institute of Power Electronics
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• v.22 no.3
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• pp.256-262
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• 2017

This paper presents the control algorithm of a single-phase AC/DC/AC PWM converter for the linear compressor of a refrigerator. The AC/DC/AC converter consists of a full-bridge PWM converter for the control of the input power factor and a half-bridge PWM inverter for the control of the single-phase linear compressor. At the DC-link of this topology, two capacitors are connected in series. These DC-link voltages must be balanced for safe operation. Thus, a new control method of DC voltage balancing for the half-bridge PWM inverter is proposed. The balancing algorithm uses the Integral-Proportional controller and inserts the DC-offset current at the Proportional-Resonant current controller of the inverter to solve the DC-link unbalanced voltages between the two capacitors. The proposed algorithm can be easily implemented without much computation and additional hardware circuit. The usefulness of the proposed algorithm is verified through several experiments.

• Proceedings of the KIPE Conference
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• 2019.07a
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• pp.364-365
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• 2019

대부분의 전력 전자 컨버터에서 사용되는 dc-link 커패시터는 입력 전원과 출력 부하 사이의 순간 전력 차이를 균형화하고, dc-link의 전압 변화를 최소화하기 위해 널리 사용된다. 일부 애플리케이션에서는 유지 시간 동안 충분한 에너지를 제공하는 데에도 사용된다. 하지만 커패시터는 시간이 지남에 따라 전기 및 환경과 같은 다양한 원인에 의해 고장이 발생하여, 전체 시스템의 가용성을 저감 시킬 수 있다. 따라서, 커패시터 고장을 발생시키는 메커니즘에 대한 검토를 통하여 예측적 유지 보수를 수행하여 전체 시스템의 가용성을 개선할 수 있을 것이다. 본 논문에서는 필름 커패시터의 고장 메커니즘, 고장 모드 및 수명 모델 검토 등을 통하여 dc-link 애플리케이션 연구에 대한 명확한 통찰력을 제공하고 필름 커패시터와 그 dc-link 애플리케이션에 대한 과제와 향후 연구방향을 확인하는 역할을 한다.

• Proceedings of the KIPE Conference
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• 2000.07a
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• pp.317-320
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• 2000

This paper proposes a voltage compensation method to improve the control performance of B4 inverter which is studied for low-cost drive systems. The B4 inverter employs only four switches and it has a center-tapped connection in the split dc-link capacitors to one phase of a three-phase motor. In the B4 topology unbalan-cd three-phase voltages will be generated by the dc link voltage ripple. To solve this problem we present a voltage compensation method which adjusts switching times considering dc link voltage ripple. The proposed method is verified by simulation results,