• Proceedings of the KIPE Conference
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• 2019.07a
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• pp.364-365
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• 2019

대부분의 전력 전자 컨버터에서 사용되는 dc-link 커패시터는 입력 전원과 출력 부하 사이의 순간 전력 차이를 균형화하고, dc-link의 전압 변화를 최소화하기 위해 널리 사용된다. 일부 애플리케이션에서는 유지 시간 동안 충분한 에너지를 제공하는 데에도 사용된다. 하지만 커패시터는 시간이 지남에 따라 전기 및 환경과 같은 다양한 원인에 의해 고장이 발생하여, 전체 시스템의 가용성을 저감 시킬 수 있다. 따라서, 커패시터 고장을 발생시키는 메커니즘에 대한 검토를 통하여 예측적 유지 보수를 수행하여 전체 시스템의 가용성을 개선할 수 있을 것이다. 본 논문에서는 필름 커패시터의 고장 메커니즘, 고장 모드 및 수명 모델 검토 등을 통하여 dc-link 애플리케이션 연구에 대한 명확한 통찰력을 제공하고 필름 커패시터와 그 dc-link 애플리케이션에 대한 과제와 향후 연구방향을 확인하는 역할을 한다.

• The Transactions of the Korean Institute of Power Electronics
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• v.27 no.4
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• pp.291-296
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• 2022

Capacitor is one of the reliability-critical components in power converters. The lifetime of the capacitor decreases as the operating temperature increases, and power losses caused by capacitor current are the main cause of the capacitor temperature increase. Therefore, various studies are being conducted to improve the lifetime of the capacitor by reducing the current of DC-link capacitors. In this study, pulse width modulation methods proposed for improving the lifetime of DC-link capacitors of the three-level NPC inverter are comparatively analyzed. The lifetime evaluation of the DC-link capacitor under different modulation methods is performed at component level first and then system level by considering all capacitors by applying Monte Carlo simulation. Furthermore, their effects on the efficiency and THD of the output current are also considered.

• The Transactions of the Korean Institute of Power Electronics
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• v.28 no.1
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• pp.59-67
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• 2023

This paper explores the variation of DC-Link current ripple analysis in terms of duty cycle and phase angle of Multi-phase/Multi-stage boost converter. A 2-Stage/1-Stage boost converter DC-Link current is used to determine the difference between the 1st stage diode current and the 2nd stage inductor current. Each stage boost converter diode and inductor current is subordinate to the phase angle and duty cycle. The magnitude of the ripple current is variable according to phase angle and duty cycle. The analysis results are verified by variation of DC-Link current ripple using a 1kW typical 2-stage/1-stage boost converter.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.58 no.5
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• pp.950-959
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• 2009

In this paper, a dc link voltage variable inverter system is proposed, which consists of a two-switch buck-boost converter and a four-switch inverter. In addition, as the current and torque ripples are generated by a voltage difference between back EMF and dc link voltage, these ripples could be reduced according to the controlled dc-link voltage according to the motor speed. The validity of the proposed inverter is verified by informative simulation and experimental results.

• Journal of the Korean Society of Manufacturing Process Engineers
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• v.12 no.4
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• pp.16-21
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• 2013

This paper presents a DC link voltage control method to reduce the ripple current and the switching loss in the sinusoidal current drive system for the wide-speed range PMSM. The DC link voltage of the three phase inverter in the sinusoidal current drive system is designed by the back-EMF voltage at maximum speed of the PMSM. In general, the drive systems have used the constant DC link voltage without reference to the motor speed. The current ripple causes hysteresis loss and makes noise. In addition, the switching loss on the inverter increases in proportion to the rise in the DC link voltage. In this paper, we propose the variable DC link voltage control method to reduce the current ripple in the PMSM drive system. We show reduction effect of the current repple and the switching loss through simulation results.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.28 no.11
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• pp.112-122
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• 2014

This paper proposes a PMSM torque control method considering DC-link voltage variation and friction torque. In general EV/HEV application, two dimensions look-up table(2D-LUT) is used for reference current generation due to its stable and robust torque control performance. Conventionally, this 2D-LUT is established by flux-torque table to overcome the DC-link voltage variation. However, the flux table establishment is more complex than the speed table establishment. Moreover, one flux data reflects several speed conditions in variable DC-link voltage, friction torque cannot be considered by using the flux table. In this paper, speed-torque 2D-LUT is used for current reference generation. With this table, PMSM torque control is well achieved regardless of DC-link voltage variation by the proposed control method. Simulation and experimental results validate improvement of torque control error through friction torque compensation.

• Journal of Power Electronics
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• v.18 no.1
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• pp.116-128
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• 2018

Conventionally, in order to reduce the ac components of the dc-link capacitors of the two-level Half-Bridge Voltage Source Inverter (HB-VSI), high dc-link capacitances are required. This necessitates the employment of short-lifetime and bulky electrolytic capacitors. In this paper, an analysis for the performance of low dc-link capacitances-based HB-VSI is presented to elucidate its ability to generate an enhanced fundamental output voltage magnitude without increasing the voltage rating of the involved switches. This feature is constrained by the load displacement factor. The introduced enhancement is due to the ac components of the capacitors' voltages. The presented approach can be employed for multi-phase systems through using multi single-phase HB-VSI(s). Mathematical analysis of the proposed approach is presented in this paper. To ensure a successful operation of the proposed approach, a closed loop current controller is examined. An expression for the critical dc-link capacitance, which is the lowest dc-link capacitance that can be employed for unipolar capacitors' voltages, is derived. Finally, simulation and experimental results are presented to validate the proposed claims.

• Journal of Power Electronics
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• v.19 no.1
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• pp.108-118
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• 2019

This paper proposes a DC-link voltage balance controller using the fourth-phase of a three-level neutral-point clamped (NPC) PWM converter with medium vector selection (MVS) PWM for common-mode voltage reduction. MVS PWM makes the voltage reference by synthesizing the voltage vectors that cannot generate common-mode voltage. This PWM method is effective for reducing the EMI noise emitted from converter systems. However, the DC-link voltage imbalance problem is caused by the use of limited voltage vectors. Therefore, in this paper, the effect of MVS PWM on the DC-link voltage of a three-level NPC converter is analyzed. Then a proportional-derivative (PD) controller for the DC-link voltage balance is designed from the DC-link modeling. In addition, feedforward compensation of the neutral point current is included in the proposed PD controller. The effectiveness of the proposed controller is verified by experimental results.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.56 no.1
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• pp.81-87
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• 2007

This paper proposes a new capacitance estimation scheme for a DC-link capacitor in a three-phase AC/DC/AC PWM converter. A controlled AC voltage with a lower frequency than the line frequency is injected into the DC-link voltage, which then causes AC power ripples at the DC side. By extracting the AC voltage and power components on the DC output side using digital filters, the capacitance can then be calculated using the Support Vector Regression (SVR). By training of SVR, a function which relates a given input (capacitor's power) and its corresponding output (capacitance value) can be derived. This function is used to predict outputs for given inputs that are not included in the training set. The proposed method does not require the information of DC-link current and can be simply implemented with only software and no additional hardware. Experimental results confirm that the estimation error is less than 0.16%.

• The Transactions of the Korean Institute of Power Electronics
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• v.23 no.2
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• pp.94-100
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• 2018

Generally, in a single-phase energy storage system (ESS) for households, AC ripple component with twice the fundamental frequency exists inevitably in the DC link voltage of single-phase PCS. In the grid-connected mode of a single-phase inverter, the AC ripple component in the DC link voltage causes low-order harmonics on grid-side current that deteriorates power quality on an AC grid. In this work, a control system adopting a feedforward controller is established to eliminate the AC ripple interference on the DC link side. Optimal battery nominal voltage design method is also proposed by considering the voltage loss and AC ripple voltage on DC link side in a single-phase ESS. Finally, the control system and battery nominal voltage design method are verified through simulations and experiments.