• Proceedings of the KIEE Conference
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• 2000.07a
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• pp.259-261
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• 2000

UPFC(Unified Power Flow Controller) consists of two voltage sourced converter(VSC)s inserted into AC system through series and parallel coupling transformer, where two VSCs are linked by capacitor at DC-side. Since VSC acts as an AC voltage source behind a reactance, where both magnitude and phase angle of the source are controllable, UPFC can be represented by the equation related to input-output relation of two VSCs. Voltage control of DC-link capacitor provides the path of real power flow between two VSCs. While UPFC is controlled for maintaining the given reference value in steady state, it should be controlled for damping power oscillation in dynamics. For such a control objective, the control strategy based on the energy function was proposed and has been shown to be effect and robust for damping power oscillation of power system. In this paper, UPFC model based on the VSC was analysed and applied to power-flow control and stability analysis. The control strategy based on the energy function is adopted for damping power oscillation of power system. The effectiveness of proposed control strategy was verified by simulation study

• JSTS:Journal of Semiconductor Technology and Science
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• v.16 no.4
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• pp.451-462
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• 2016

Photovoltaic energy conversion becomes main focus of many researches due to its promising potential as source for future electricity and has many advantages than the other alternative energy sources like wind, solar, ocean, biomass, geothermal etc. In Photovoltaic power generation multilevel inverters play a vital role in power conversion. The three different topologies, diode-clamped (neutral-point clamped) inverter, capacitor-clamped (flying capacitor) inverter and cascaded h-bridge multilevel inverter are widely used in these multilevel inverters. Among the three topologies, cascaded h-bridge multilevel inverter is more suitable for photovoltaic applications since each pv array can act as a separate dc source for each h-bridge module. This paper presents a single phase Cascaded H-bridge five level inverter for grid-connected photovoltaic application using sinusoidal pulse width modulation technique. This inverter output voltage waveform reduces the harmonics in the generated current and the filtering effort at the input. The control strategy allows the independent control of each dc-link voltages and tracks the maximum power point of PV strings. This topology can inject to the grid sinusoidal input currents with unity power factor and achieves low harmonic distortion. A PID control algorithm is implemented in Arm Processor LPC2148. The validity of the proposed inverter is verified through simulation and is implemented in a single phase 100W prototype. The results of hardware are compared with simulation results. The proposed system offers improved performance over conventional three level inverter in terms of THD.

• Proceedings of the KIPE Conference
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• 2001.12a
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• pp.171-174
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• 2001

This paper proposes a nonlinear impedance circuit composed by diodes and inductors or capacitors. This circuit needs no control circuits and switches, and the impedance .value is changed by the polarity of current or voltage. and this paper presents one of these applications to improve the input current of capacitor input diode rectifiers. The rectifier using the nonlinear impedance circuit id constructed with four diodes and four capacitors in addition to the conventional rectifiers, that is, it has eight diodes and five capacitors, including a DC link capacitor. It makes harmonic components of the input current reduce and the power factor improve. A circuit design method is shown by experimentation and confirmed simulation. It explained that compared conventional pulse width modulated (PWM) inverter with half pulse-width modulated (HPWM) inverter. Proposed HPWM inverter eliminated dead-time by lowering switching loss and holding over-shooting.

• Proceedings of the KIEE Conference
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• 2001.07b
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• pp.1044-1048
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• 2001

This paper proposes a nonlinear impedance circuit composed by diodes and inductors or capacitors. This circuit needs no control circuits and switches, and the impedance value is changed by the polarity of current or voltage. This paper presents one of these applications to improve the input current of capacitor input diode rectifiers. The rectifier using the nonlinear impedance circuit id constructed with four diodes and four capacitors in addition to the conventional rectifiers, that is, it has eight diodes and five capacitors, including a DC link capacitor. It makes harmonic components of the input current reduce and the power factor improve. A circuit design method is shown by experimentation and confirmed simulation. It explained that compared conventional pulse-width modulated (PWM)inverter with half pulse-width modulated (HPWM) inverter proposed HPWM inverter eliminated dead-time by lowering switching loss and holding over-shooting.

• Proceedings of the IEEK Conference
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• 2001.06e
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• pp.241-244
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• 2001

This paper proposes a nonlinear impedance circuit composed by diodes and inductors or capacitors. This circuit needs no control circuits and switches, and the impedance value is changed by the polarity of current or voltage, This paper presents one of these applications to improve the input current of capacitor input diode rectifiers. The rectifier using the nonlinear impedance circuit id constructed with four diodes and four capacitors in addition to the conventional rectifiers, that is it has eight diodes and five capacitors, including a DC link capacitor. It makes harmonic components of the input current reduce and the power factor improve. A circuit design method is shown by experimentation and confirmed simulation. It explained that compared conventional pulse-width modulated (PWM)inverter with half pulse-width modulated (HPWM) inverter. Proposed HPWM inverter eliminated dead-time by lowering switching loss and holding over-shooting.

• Journal of Power Electronics
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• v.19 no.1
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• pp.99-107
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• 2019

This study proposes a new modulation strategy to deal with unbalanced output voltage that is based on three-level neutral-point-clamped cascaded rectifiers. The fundament idea is to reallocate the value of the voltage levels generated by each of the modules on the basis of space vector pulse width modulation. This proposed modulation strategy can reduce the switching frequency while maintaining the mutual-module voltage balance. First, an analysis of unbalanced output voltage is reflected. Then a new modulation strategy is introduced in detail. Internal module capacitor voltages are balanced by the selection of redundant vectors. Moreover, the voltage balance ability is calculated. Finally, the feasibility of this modulation strategy is verified through experimental results.

• The Transactions of the Korean Institute of Power Electronics
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• v.16 no.3
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• pp.283-292
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• 2011

This paper proposed a new multi-level inverter topology based on a H-bridge with two switches and two diodes connected to the DC-link. The output voltage of the proposed topology is quite closer to a sinusoidal waveform compared with a typical single phase inverter. The proposed multi-level inverter is applicable to a power conditioning system for renewable energy sources, and it can be also used as a building block of a cascaded multi-level inverter for a high voltage application. In case of conventional H-bridge type or NPC type multi-level inverter, 8 controllable switches are used to obtain a 5 level output voltage, but the proposed multi-level inverter requires only 6 controllable switches. Thus the circuit configuration is quite simple, reliable and cost-effective implementation is possible. The efficiency can be improved owing to the reduction of the switching loss. A new PWM method based on POD modulation is suggested which requires only one carrier signal. The switching sequence to make the capacitor voltage balanced is also considered. The feasibility is studied through simulation and experiment.

• Journal of Power Electronics
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• v.19 no.4
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• pp.881-893
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• 2019

This paper proposes a practical sliding-mode controller design for shaping the impedances of cascaded boost-converter power decoupling circuits for reducing the second order harmonic ripple in photovoltaic (PV) current. The cascaded double-boost converter, when used as power decoupling circuit, has some advantages in terms of a high step-up voltage-ratio, a small number of switches and a better efficiency when compared to conventional topologies. From these features, it can be seen that this topology is suitable for residential (PV) rooftop systems. However, a robust controller design capable of rejecting double frequency inverter ripple from passing to the (PV) source is a challenge. The design constraints are related to the principle of the impedance-shaping technique to maximize the output impedance of the input-side boost converter, to block the double frequency PV current ripple component, and to prevent it from passing to the source without degrading the system dynamic responses. The design has a small recovery time in the presence of transients with a low overshoot or undershoot. Moreover, the proposed controller ensures that the ripple component swings freely within a voltage-gap between the (PV) and the DC-link voltages by the small capacitance of the auxiliary DC-link for electrolytic-capacitor elimination. The second boost controls the main DC-link voltage tightly within a satisfactory ripple range. The inverter controller performs maximum power point tracking (MPPT) for the input voltage source using ripple correlation control (RCC). The robustness of the proposed control was verified by varying system parameters under different load conditions. Finally, the proposed controller was verified by simulation and experimental results.

• Journal of Power Electronics
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• v.14 no.1
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• pp.48-60
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• 2014

Multilevel inverters have been widely used for high-voltage and high-power applications. Their performance is greatly superior to that of conventional two-level inverters due to their reduced total harmonic distortion (THD), lower switch ratings, lower electromagnetic interference, and higher dc link voltages. However, they have some disadvantages such as an increased number of components, a complex pulse width modulation control method, and a voltage-balancing problem. In this paper, a novel nine-level reduced switch cascaded multilevel inverter based on a multilevel DC link (MLDCL) inverter topology with reduced switching components is proposed to improve the multilevel inverter performance by compensating the above mentioned disadvantages. This topology requires fewer components when compared to diode clamped, flying capacitor and cascaded inverters and it requires fewer carrier signals and gate drives. Therefore, the overall cost and circuit complexity are greatly reduced. This paper presents modulation methods by a novel reference and multicarrier based PWM schemes for reduced switch cascaded multilevel inverters (RSCMLI). It also compares the performance of the proposed scheme with that of conventional cascaded multilevel inverters (CCMLI). Simulation results from MATLAB/SIMULINK are presented to verify the performance of the nine-level RSCMLI. Finally, a prototype of the nine-level RSCMLI topology is built and tested to show the performance of the inverter through experimental results.

• The Transactions of the Korean Institute of Power Electronics
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• v.10 no.1
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• pp.61-69
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• 2005

The topology of NPC inverter coupled with the large number of devices used increases the probability of device failure. It's necessary to develop an optimal remedial strategy which can be used to continue the application when fault occurs. The fault tolerance is obtained by the use of the proposed method. The proposed method utilizes that the one phase load with the failed power device could be connected to the center-tap of the DC-link capacitor in order to dc-link voltage with balance and the sinusoidal phase current with constant amplitude under the single power device fault condition. The strategy described in this paper is expected to provide an economic alternative to more expensive redundancy techniques.