• Title/Summary/Keyword: DC voltage balancing

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A STUDY ON PARALLEL OPERATION OF TWO 3-PHASE PWM CONVERTERS (3상 PWM 컨버터의 병렬운전에 관한 연구)

  • Min, B.G.;Ryu, S.P.;Baek, B.S.;Shin, H.J.;Kim, Y.P.;Kim, D.U.
    • Proceedings of the KIEE Conference
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    • 1998.11a
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    • pp.156-158
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    • 1998
  • This paper presents parallel operation of two 3-phase PWM converters whose Power and control schemes can be directly applied to a large capacity system. This paper describes power circuit, dc voltage regulation, input power factor correction and balancing load control of two converters. Switching device Is IGBT and CPU of control is 32-bit floating point DSP for real time instantaneous control. Simulations and experimental results for 20kw model conform the validity of proposed schemes.

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The Implementation of Current Compensation Controller in Driving Voltage type Converter considering the Unbalance of Reactor at the Source Side (전원측 리액터 불평형을 고려한 전압형 컨버터의 전류 보상 제어기 구현)

  • Chun Ji-Yong;Cho Yu-Hwan;Lee Geun-Hong
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.5 no.5
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    • pp.413-420
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    • 2004
  • In this paper, the control algorithm of DC source device for inverter starting is proposed and the control method for compensating unbalance system source on operating time in the voltage type PWM converter with driving and regenerative faculty is suggested. The maintaining method of balancing condition for converter of AC source is used the compensating unbalanced status by current control loop. In order to solve the problem which the unbalanced system control is used to leakage transformer not equaled reactance by each phase in rectifier system. The proposed H/W and control algorithm of rectifier system is contributed to minimize of device and rising efficiency.

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Design Optimization of Hybrid-Integrated 20-Gb/s Optical Receivers

  • Jung, Hyun-Yong;Youn, Jin-Sung;Choi, Woo-Young
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.14 no.4
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    • pp.443-450
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    • 2014
  • This paper presents a 20-Gb/s optical receiver circuit fabricated with standard 65-nm CMOS technology. Our receiver circuits are designed with consideration for parasitic inductance and capacitance due to bonding wires connecting the photodetector and the circuit realized separately. Such parasitic inductance and capacitance usually disturb the high-speed performance but, with careful circuit design, we achieve optimized wide and flat response. The receiver circuit is composed of a transimpedance amplifier (TIA) with a DC-balancing buffer, a post amplifier (PA), and an output buffer. The TIA is designed in the shunt-feedback configuration with inductive peaking. The PA is composed of a 6-stage differential amplifier having interleaved active feedback. The receiver circuit is mounted on a FR4 PCB and wire-bonded to an equivalent circuit that emulates a photodetector. The measured transimpedance gain and 3-dB bandwidth of our optical receiver circuit is 84 $dB{\Omega}$ and 12 GHz, respectively. 20-Gb/s $2^{31}-1$ electrical pseudo-random bit sequence data are successfully received with the bit-error rate less than $10^{-12}$. The receiver circuit has chip area of $0.5mm{\times}0.44mm$ and it consumes excluding the output buffer 84 mW with 1.2-V supply voltage.

A Fault Tolerant Control Technique for Hybrid Modular Multi-Level Converters with Fault Detection Capability

  • Abdelsalam, Mahmoud;Marei, Mostafa Ibrahim;Diab, Hatem Yassin;Tennakoon, Sarath B.
    • Journal of Power Electronics
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    • v.18 no.2
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    • pp.558-572
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    • 2018
  • In addition to its modular nature, a Hybrid Modular Multilevel Converter (HMMC) assembled from half-bridge and full-bridge sub-modules, is able to block DC faults with a minimum number of switching devices, which makes it attractive for high power applications. This paper introduces a control strategy based on the Root-Least Square (RLS) algorithm to estimate the capacitor voltages instead of using direct measurements. This action eliminates the need for voltage transducers in the HMMC sub-modules and the associated communication link with the central controller. In addition to capacitor voltage balancing and suppression of circulating currents, a fault tolerant control unit (FTCU) is integrated into the proposed strategy to modify the parameters of the HMMC controller. On advantage of the proposed FTCU is that it does not need extra components. Furthermore, a fault detection unit is adapted by utilizing a hybrid estimation scheme to detect sub-module faults. The behavior of the suggested technique is assessed using PSCAD offline simulations. In addition, it is validated using a real-time digital simulator connected to a real time controller under various normal and fault conditions. The proposed strategy shows robust performance in terms of accuracy and time response since it succeeds in stabilizing the HMMC under faults.

Power Compensator Control for Improving Unbalanced Power of AC Electric Railway (교류전기철도 불평형 전력 개선을 위한 전력보상장치 제어)

  • Woo, Jehun;Jo, Jongmin;Lee, Tae-Hoon;Cha, Hanju
    • The Transactions of the Korean Institute of Power Electronics
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    • v.25 no.3
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    • pp.213-218
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    • 2020
  • In this study, we propose a control algorithm to reduce the unbalanced characteristics of a three-phase system power caused by the unbalanced load of the AC electric railway. Then, we verify its performance through the design of a power compensator and experiments applying it. Like electric railway systems, a Scott transformer is applied, and the load and single-phase back-to-back converters are connected to the M-phase and T-phase outputs. The back-to-back converter monitors the difference in active power between the unbalanced loads in real-time and compensates for the power by using bidirectional characteristics. The active power is performed through PI control in the synchronous coordinate system, and DC link overall voltage and voltage balancing control are controlled jointly by M-phase and T-phase converters to improve the responsiveness of the system. To verify the performance of the proposed power compensation device, an experiment was performed under the condition that M-phase 5 kW and T-phase 1 kW unbalanced load. As a result of the experiment, the unbalance rate of the three-phase current after the operation of the power compensator decreases by 58.66% from 65.04% to 6.38%, and the excellent performance of the power compensator proposed in this study is verified.

The Ejector Design and Test for 5kW Molten Carbonate Fuel Cell (75kW 용융탄산염 연료전지 시스템의 MBOP 개발)

  • Kim, Beom-Joo;Kim, Do-Hyung;Lee, Jung-Hyun;Kang, Seung-Won;Lim, Hee-Chun
    • 한국신재생에너지학회:학술대회논문집
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    • 2009.06a
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    • pp.353-356
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    • 2009
  • A pivotal mechanical balance of plant for 75kW class molten carbonate fuel cells comprise of a catalytic burner and an ejector which has been designed and tested in KEPRI(Korea Electric Power Research Institute). The catalytic burner, which oxidizes residual fuel in the anode tail gas, was operated at several conditions. Some problems arose due to local overheating or auto-ignition, which could limit the catalyst life. The catalytic burner was designed by considering both gas mixing and gas velocity. Test results showed that the temperature distribution is very uniform. In addition, an ejector is a fluid machinery to be utilized for mixing fluids, maintaining vacuum, and transporting them. The ejector is placed at mixing point between the anode off gas and the cathode off gas or the fresh air Several ejectors were designed and tested to form a suction on the fuel tail gas and balance the differential pressures between anode and cathode over a range of operating conditions. The tests showed that the design of the nozzle and throat played an important role in balancing the anode tail and cathode inlet gas pressures. The 75kW MCFC system built in our ejector and catalytic burner was successfully operated from Novembe, 2008 to April, 2009. It recorded the voltage of 104V at the current of 754A and reached the maximum generating power of 78.5kW DC. The results for both stand-alone and integration into another balance of plant are discussed.

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