• Proceedings of the KIEE Conference
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• 2008.07a
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• pp.750-751
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• 2008

본 논문은 컨버터용 변압기의 여자전류 해석을 통해 DC 성분 유입시 자속밀도-여자전류 곡선 그래프를 도출하여 철심포화 여부를 확인하며, 철심 공극에 의해 발생되는 누설자속(Leakage Flux)으로 인한 철구조물(Lock Plate)의 와전류 손실을 계산하였다. 변압기 해석을 위해 상용 해석 소프트웨어인 Maxwell 3D를 이용하였고, 철심의 비선형성을 고려하여 해석하였다.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1994.05a
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• pp.46-49
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• 1994

In order to investigate possibility of CV cable diagnosis technique, residual insulation characteristics of .long - term serviced 0.6 kV CV Cable are examined by DC leakage current residual voltage tensile strength, cross1inking density and AC & impulse breakdown. Also effect of cable structure and water tree are reported

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2001.07a
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• pp.190-193
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• 2001

ZnO varistors have been widely used to protect power system and electronic system against overvoltages based on their excellent nonlinearity. In order to increase their protection capability, the fracture and protection technologies of arresters have to study according to their applications, namely ImA DC voltage, leakage currents, impulse residual voltages, withstanding capability to impulse surge, and energy absorption capability. ZnO varistors which have nonlinear current-voltage characteristic name a number of failure mechanism when ZnO elements absorb surge energies. Failure mode by thermal stress and Pin hole are among the most common failure mechanism at the high current surge current. In this study, the fracture mechaism of power arresters are introduced and protection technologies are researched. In particular the effect of thermal stress by surge currents to ZnO elements and methods against arc surge energy through withstand structure design of arrester are discussed.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.34C no.11
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• pp.1-11
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• 1997

The transient current components of the dRAM are analyzed and the sensing current, data path operation current and DC leakage current are revealed to be the major curretn components. It is expected that the supply voltage of less than 1.5V with low VT MOS witll be used in multi-giga bit dRAM. A low voltage dual VT self-timed CMOS logic in which the subthreshold leakage current path is blocked by a large high-VT MOS is proposed. An active signal at each node of the nature speeds up the signal propagation and enables the synchronous DRAM to adopt a fast pipelining scheme. The sensing current can be reduced by adopting 8 bit prefetch scheme with 1.2V VDD. Although the total cycle time for the sequential 8 bit read is the same as that of the 3.3V conventional DRAM, the sensing current is loered to 0.7mA or less than 2.3% of the current of 3.3V conventional DRAM. 4 stage pipeline scheme is used to rduce the power consumption in the 4 giga bit DRAM data path of which length and RC delay amount to 3 cm and 23.3ns, respectively. A simple wave pipeline scheme is used in the data path where 4 sequential data pulses of 5 ns width are concurrently transferred. With the reduction of the supply voltage from 3.3V to 1.2V, the operation current is lowered from 22mA to 2.5mA while the operation speed is enhanced more than 4 times with 6 ns cycle time.

• Proceedings of the KIPE Conference
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• 2005.07a
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• pp.125-127
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• 2005

In this paper, the control algorithm of DC source device for inverter starting is proposed and the control method for compensating unbalance system source on operating time in the voltage type PWM converter with driving and regenerative faculty is suggested. The maintaining way of balancing condition for converter of AC source is used the compensating unbalanced status by current control loop. Because it is possible that the unbalanced System control is used to leakage transformer not equaled reactance by each phase in rectifier system, the proposed H/W and control algorithm of rectifier system is contributed to minimize of device and rising efficiency.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.64 no.12
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• pp.1724-1729
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• 2015

Chlorosulfonated polyethylene (CSPE) was not flooded seawater and flooded seawater & freshwater for 5 days, respectively, and these samples are referred to as BSF(before seawater flooding) and ASFF(after seawater & freshwater flooding), respectively. The apparent density, dissipation factor, relative permittivity, melting temperature, dielectric breakdown time and increased time of applied voltage are higher than those of BSF, but the insulating resistance, dielectric strength, percent elongation and glass transition temperature of ASFF are lower than those of BSF. The differential temperature of those is $0.026{\sim}0.028(^{\circ}C)$ after AC and DC voltage is applied to ASFF, respectively, and the differential temperature of those is $0.013{\sim}0.037(^{\circ}C)$ after AC and DC voltage is applied to BSF, respectively. In the case AC and DC voltage is applied to ASFF as well as BSF, the variations in temperature of AC voltage are higher than those of DC voltage. It is investigated that dielectric loss due to dissipation factor ($tan{\delta}$) is related to electric dipole conduction current. It is certain that the ionic (electron or hole) leakage current was increased by conducting ions such as $Na^+$, $Cl^-$, $Mg^{2+}$, $SO_4^{2-}$, $Ca^{2+}$ and $K^+$, those are related to cured atoms of O and S that relatively increased after seawater flooding.

• The Transactions of the Korean Institute of Power Electronics
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• v.18 no.2
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• pp.184-191
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• 2013

In this paper, bidirectional AC-DC converter using dual half-bridge converter is proposed. A transformer leakage inductance in the dual half-bridge converter is used for making resonance with the capacitor of the voltage-doubler, which can help the switched current to be sinusoidal without extra inductive component and also the switching loss can be reduced through operation such as ZVS, ZCS. Both circuit analysis and design guideline are described, and also the feasibility for the proposed converter is shown through the hardware implementation and the experimental results.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.16 no.12
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• pp.1071-1076
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• 2003

The nonlinear properties and their stability of ZPCCD- based varistors, which are composed of ZnO P $r_{6}$ $O_{ll}$ - CoO-C $r_2$ $O_3$-D $y_2$ $O_3$-based ceramics, were investigated in the D $y_2$ $O_3$ content range of 0.0∼2.0 mol%. The incorporation of D $y_2$ $O_3$ greatly affected the nonlinear properties and the best nonlinearity was obtained from 0.5 mol% D $y_2$ $O_3$ with nonlinear exponent of 66.6 and leakage current of 1.2 $\mu$A. Further addition of D $y_2$ $O_3$ deteriorated the nonlinear properties. In stability against DC accelerated aging stress state: 0.95 $V_{1mA}$/15$0^{\circ}C$/24 h, the 0.5 mol％ D $y_2$ $O_3$-doped varistor exhibited the highest stability, in which the variation rate of varistor voltage and nonlinear exponent are -1.9% and 10.5%, respectively. The remainder varistors resulted in thermal runaway due to low density of ceramics.s.s.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.11a
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• pp.330-333
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• 2002

The stability against DC accelerated aging stress of $Dy_{2}O_{3}-doped$ $ZnO-Pr_{6}O_{11}-based$ varistor ceramics was investigated. The calculated nonlinear exponent$(\alpha)$ in varistor ceramics without $Dy_{2}O_{3}$ was only 4.9, whereas the $\alpha$ value of the varistors with $Dy_{2}O_{3}$ was abruptly increased in the range of 48.8 to 58.6. The varistor ceramics with $Dy_{2}O_{3}$ content of 1.0 mol% exhibited maximum ${\alpha}$, reaching 58.6, whereas they exhibited very poor stability. While, The varistor ceramics doped with 0.5 mol% $Dy_{2}O_{3}$ exhibited not only the high nonlinearity, which the ${\alpha}$ is 55.3 and the leakage current is $0.1{\mu}A$， but also the highest stability, which the variation rates of varistor voltage and nonlinear exponent are -0.8% and -14.3%, respectively, under DC accelerated aging stress, $0.95 V_{1mA}/150^{\circ}C/24h$.

• Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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• 2009.05a
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• pp.384-387
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• 2009

There is an increasing demand for efficient high power/weight auxiliary power supplies for use on high speed traction application. Many new conversion techniques have been proposed to reduce the voltage and current stress of switching components, and the switching losses in the traditional pulse width modulation (PWM) converter. Especially, the phase shift full bridge zero voltage switching PWM techniques are thought must desirable for many applications because this topology permits all switching devices to operate under zero voltage switching(ZVS) by using circuit parasitic components such as leakage inductance of high frequency transformer and power device junction capacitance. The proposed topology is found to have higher efficiency than conventional soft-switching converter. Also it is easily applicable to phase shift full bridge converter by applying an energy recovery snubber consisted of fast recovery diodes and capacitors.