• 대한전기학회:학술대회논문집
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• 대한전기학회 2000년도 하계학술대회 논문집 A
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• pp.259-261
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• 2000

UPFC(Unified Power Flow Controller) consists of two voltage sourced converter(VSC)s inserted into AC system through series and parallel coupling transformer, where two VSCs are linked by capacitor at DC-side. Since VSC acts as an AC voltage source behind a reactance, where both magnitude and phase angle of the source are controllable, UPFC can be represented by the equation related to input-output relation of two VSCs. Voltage control of DC-link capacitor provides the path of real power flow between two VSCs. While UPFC is controlled for maintaining the given reference value in steady state, it should be controlled for damping power oscillation in dynamics. For such a control objective, the control strategy based on the energy function was proposed and has been shown to be effect and robust for damping power oscillation of power system. In this paper, UPFC model based on the VSC was analysed and applied to power-flow control and stability analysis. The control strategy based on the energy function is adopted for damping power oscillation of power system. The effectiveness of proposed control strategy was verified by simulation study

• JSTS:Journal of Semiconductor Technology and Science
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• 제16권4호
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• pp.451-462
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• 2016

Photovoltaic energy conversion becomes main focus of many researches due to its promising potential as source for future electricity and has many advantages than the other alternative energy sources like wind, solar, ocean, biomass, geothermal etc. In Photovoltaic power generation multilevel inverters play a vital role in power conversion. The three different topologies, diode-clamped (neutral-point clamped) inverter, capacitor-clamped (flying capacitor) inverter and cascaded h-bridge multilevel inverter are widely used in these multilevel inverters. Among the three topologies, cascaded h-bridge multilevel inverter is more suitable for photovoltaic applications since each pv array can act as a separate dc source for each h-bridge module. This paper presents a single phase Cascaded H-bridge five level inverter for grid-connected photovoltaic application using sinusoidal pulse width modulation technique. This inverter output voltage waveform reduces the harmonics in the generated current and the filtering effort at the input. The control strategy allows the independent control of each dc-link voltages and tracks the maximum power point of PV strings. This topology can inject to the grid sinusoidal input currents with unity power factor and achieves low harmonic distortion. A PID control algorithm is implemented in Arm Processor LPC2148. The validity of the proposed inverter is verified through simulation and is implemented in a single phase 100W prototype. The results of hardware are compared with simulation results. The proposed system offers improved performance over conventional three level inverter in terms of THD.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2001년도 추계학술대회 논문집
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• pp.171-174
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• 2001

This paper proposes a nonlinear impedance circuit composed by diodes and inductors or capacitors. This circuit needs no control circuits and switches, and the impedance .value is changed by the polarity of current or voltage. and this paper presents one of these applications to improve the input current of capacitor input diode rectifiers. The rectifier using the nonlinear impedance circuit id constructed with four diodes and four capacitors in addition to the conventional rectifiers, that is, it has eight diodes and five capacitors, including a DC link capacitor. It makes harmonic components of the input current reduce and the power factor improve. A circuit design method is shown by experimentation and confirmed simulation. It explained that compared conventional pulse width modulated (PWM) inverter with half pulse-width modulated (HPWM) inverter. Proposed HPWM inverter eliminated dead-time by lowering switching loss and holding over-shooting.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2001년도 하계학술대회 논문집 B
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• pp.1044-1048
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• 2001

This paper proposes a nonlinear impedance circuit composed by diodes and inductors or capacitors. This circuit needs no control circuits and switches, and the impedance value is changed by the polarity of current or voltage. This paper presents one of these applications to improve the input current of capacitor input diode rectifiers. The rectifier using the nonlinear impedance circuit id constructed with four diodes and four capacitors in addition to the conventional rectifiers, that is, it has eight diodes and five capacitors, including a DC link capacitor. It makes harmonic components of the input current reduce and the power factor improve. A circuit design method is shown by experimentation and confirmed simulation. It explained that compared conventional pulse-width modulated (PWM)inverter with half pulse-width modulated (HPWM) inverter proposed HPWM inverter eliminated dead-time by lowering switching loss and holding over-shooting.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2001년도 하계종합학술대회 논문집(5)
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• pp.241-244
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• 2001

This paper proposes a nonlinear impedance circuit composed by diodes and inductors or capacitors. This circuit needs no control circuits and switches, and the impedance value is changed by the polarity of current or voltage, This paper presents one of these applications to improve the input current of capacitor input diode rectifiers. The rectifier using the nonlinear impedance circuit id constructed with four diodes and four capacitors in addition to the conventional rectifiers, that is it has eight diodes and five capacitors, including a DC link capacitor. It makes harmonic components of the input current reduce and the power factor improve. A circuit design method is shown by experimentation and confirmed simulation. It explained that compared conventional pulse-width modulated (PWM)inverter with half pulse-width modulated (HPWM) inverter. Proposed HPWM inverter eliminated dead-time by lowering switching loss and holding over-shooting.

• Journal of Power Electronics
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• 제19권1호
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• pp.99-107
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• 2019

This study proposes a new modulation strategy to deal with unbalanced output voltage that is based on three-level neutral-point-clamped cascaded rectifiers. The fundament idea is to reallocate the value of the voltage levels generated by each of the modules on the basis of space vector pulse width modulation. This proposed modulation strategy can reduce the switching frequency while maintaining the mutual-module voltage balance. First, an analysis of unbalanced output voltage is reflected. Then a new modulation strategy is introduced in detail. Internal module capacitor voltages are balanced by the selection of redundant vectors. Moreover, the voltage balance ability is calculated. Finally, the feasibility of this modulation strategy is verified through experimental results.

• 전력전자학회논문지
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• 제16권3호
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• pp.283-292
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• 2011

본 논문에서는 기존의 멀티레벨 인버터와는 달리 DC링크단에 스위치를 설치함으로써 성능을 향상시킨 새로운 형태의 H-브리지 멀티레벨 인버터를 제안한다. 제안된 방식은 계통 연계형 단상 멀티레벨 인버터로서 기존의 단상인버터에 비하여 출력 전압 파형이 정현파에 가깝고, 고압 대용량 시스템용 멀티레벨 인버터로의 확장도 용이할 뿐만 아니라 직렬연결을 통하여 간단히 전압레벨을 확장할 수 있다는 장점을 갖는다. 동일한 5레벨의 경우 기존의 H-브리지 직렬형이나 NPC형 멀티레벨 인버터는 가제어 스위치가 8개 사용되는 반면에 제안한 멀티레벨 인버터는 가제어 스위치가 6개 사용되기 때문에 회로 구성이 간단하여 신뢰도가 높고 경제적인 구현이 가능하고 스위칭 손실이 줄어서 효율이 향상되는 특징이 있다. POD 변조기법을 기반으로 하여 반송파 신호 하나만을 사용하는 새로운 PWM 방법을 제시하였으며 DC링크 커패시터 전압의 균형을 위한 스위칭 시퀀스에 대해서도 검토하였다. 제안된 토폴로지의 타당성을 시뮬레이션과 실험을 통하여 확인하였다.

• Journal of Power Electronics
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• 제19권4호
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• pp.881-893
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• 2019

This paper proposes a practical sliding-mode controller design for shaping the impedances of cascaded boost-converter power decoupling circuits for reducing the second order harmonic ripple in photovoltaic (PV) current. The cascaded double-boost converter, when used as power decoupling circuit, has some advantages in terms of a high step-up voltage-ratio, a small number of switches and a better efficiency when compared to conventional topologies. From these features, it can be seen that this topology is suitable for residential (PV) rooftop systems. However, a robust controller design capable of rejecting double frequency inverter ripple from passing to the (PV) source is a challenge. The design constraints are related to the principle of the impedance-shaping technique to maximize the output impedance of the input-side boost converter, to block the double frequency PV current ripple component, and to prevent it from passing to the source without degrading the system dynamic responses. The design has a small recovery time in the presence of transients with a low overshoot or undershoot. Moreover, the proposed controller ensures that the ripple component swings freely within a voltage-gap between the (PV) and the DC-link voltages by the small capacitance of the auxiliary DC-link for electrolytic-capacitor elimination. The second boost controls the main DC-link voltage tightly within a satisfactory ripple range. The inverter controller performs maximum power point tracking (MPPT) for the input voltage source using ripple correlation control (RCC). The robustness of the proposed control was verified by varying system parameters under different load conditions. Finally, the proposed controller was verified by simulation and experimental results.

• Journal of Power Electronics
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• 제14권1호
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• pp.48-60
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• 2014

Multilevel inverters have been widely used for high-voltage and high-power applications. Their performance is greatly superior to that of conventional two-level inverters due to their reduced total harmonic distortion (THD), lower switch ratings, lower electromagnetic interference, and higher dc link voltages. However, they have some disadvantages such as an increased number of components, a complex pulse width modulation control method, and a voltage-balancing problem. In this paper, a novel nine-level reduced switch cascaded multilevel inverter based on a multilevel DC link (MLDCL) inverter topology with reduced switching components is proposed to improve the multilevel inverter performance by compensating the above mentioned disadvantages. This topology requires fewer components when compared to diode clamped, flying capacitor and cascaded inverters and it requires fewer carrier signals and gate drives. Therefore, the overall cost and circuit complexity are greatly reduced. This paper presents modulation methods by a novel reference and multicarrier based PWM schemes for reduced switch cascaded multilevel inverters (RSCMLI). It also compares the performance of the proposed scheme with that of conventional cascaded multilevel inverters (CCMLI). Simulation results from MATLAB/SIMULINK are presented to verify the performance of the nine-level RSCMLI. Finally, a prototype of the nine-level RSCMLI topology is built and tested to show the performance of the inverter through experimental results.

• 전력전자학회논문지
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• 제10권1호
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• pp.61-69
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• 2005

NPC 인버터는 많은 수의 전력용 반도체 소자로 구성되어 있으므로 다른 고장의 유형보다 전력용 반도체 스위치의 고장 발생 가능성이 더욱 크다. 고장발생시에 시스템의 연속적인 운전을 위한 대책의 개발은 매우 필요하며, 이러한 고장은 제안된 방법을 이용함으로써 시스템의 고장 허용 능력을 향상할 수 있다. 제안된 방법은 하나의 전력용 반도체 고장발생시 고장난 전력용 반도체가 포함된 고장상을 직렬 연결된 커패시터의 접속점에 연결한 후 나머지 두상을 이용하여 제어함으로써 직류-링크 전압을 유지하고, 일정한 크기를 가지는 출력 부하상전류를 연속적으로 시스템에 공급할 수 있다. 제안된 방법은 몇가지 특별한 분야에서 값비싼 다른 대안책들보다 더 경제적인 대안이다.