• Journal of Electrochemical Science and Technology
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• v.1 no.2
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• pp.81-84
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• 2010

In dye-sensitized solar cells (DSSCs), the back transfer of photo-generated electrons from FTO glass to triiodide ions in an electrolyte is an important loss mechanism, which leads to low cell efficiency. Recently, this back electron transfer was greatly suppressed by the introduction of a compact $TiO_2$ blocking layer, which was prepared by the treatment of $TiCl_4$ solution. In the present work, more detailed $TiCl_4$ treated surface conditions on FTO substrate were investigated and DSSC performances were correlated with the surface morphology as well as dark current behavior.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.11a
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• pp.157-158
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• 2007

Effects of post-metallization anneal (PMA) on interface trap characteristics of Si-$SiO_2$ are studied. The conventional PMA method utilizes forming gas anneal, where 10% hydrogen in nitrogen atmosphere is used. A new PMA method utilizes hydrogen rich PECVD- silicon nitride $(SiN_x)$ film as a hydrogen diffusion source and a out-diffusion blocking layer. It can be shown through charge pumping current measurement that the new PMA is indeed effective to decrease Si-$SiO_2$ interface trap density.

• ETRI Journal
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• v.13 no.4
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• pp.2-9
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• 1991

Buried-heterostructure lasers are more difficult to fabricate than weakly index guided or gain guided lasers. However, these strongly index guided structures are most suitable for a source of lightwave transmission systems. But, for conventional etched mesa buried heterostructure lasers, the regrowth of InP blocking layer is difficult and irreproducible. So, there are inevitable leakage currents flowing outside the active region resulting poor performance. To eliminate these problems, we used a planar buried heterostructure. As a results, the average threshold current was 28mA and the differential quantum efficiency was about 20% per facet for $1.3\mum$ GaInAsP/InP PBH-LD. The initial forward leakage current was not exceeding $1\muA$ and the reverse voltage for $-10\muA$ was -3V~-5V, these are improved figure of 1mA~10mA and -1V~-3V for EMBH laser diode. The chip modulation bandwidth was more than 2.4GHz for $1.5I_th$.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.08a
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• pp.250-250
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• 2012

Organic light-emitting diodes (OLED) and polymer light emitting diodes (PLED) have been regarded as the candidate for the next generation light source and flat panel display. Currently, the most common OLED industrial fabrication technology used in producing real products utilizes a fine shadow mask during the thermal evaporation of small molecule materials. However, due to high potential including low cost, easy process and scalability, various researches about solution process are progressed. Since polymer has some disadvantages such as short lifetime and difficulty of purifying, small molecule OLED (SMOLED) can be a good alternative. In this work, we have demonstrated high efficient solution-processed OLED with small molecule. We use CBP (4,4'-N,N'-dicarbazolebiphenyl) as a host doped with green dye (Ir(ppy)3 (fac-tris(2-phenyl pyridine) iridium)). PBD (2-(4-biphenylyl)-5-(4-tert-butylphenyl)-1,3,4-oxadiazole) and TPD (N,N'diphenyl-N,N'-Bis (3-methylphenyl)-[1,1-biphenyl]-4,4'-diamine) are employed as an electron transport material and a hole transport material. And TPBi (2,2',2''-(1,3,5-phenylene) tris (1-phenyl-1H-benzimidazole)) is used as an hole blocking layer for proper hole and electron balance. With adding evaporated TPBi layer, the current efficiency was very improved. Among various parameters, we observed the property of OLED device by changing the thickness of hole transporting layer and solvent which can dissolve organic material. We could make small molecule OLED device with finding proper conditions.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.67 no.1
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• pp.68-74
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• 2018

All transparent UV photodetector based on ZnO was fabricated with structure of NiO/ZnO/$SnO_2$/ITO by using RF and DC magnetron sputtering system. ZnO was deposited with 4 inch ZnO target (purity 99.99%) for a quality film. In order to build p-n junction up, p-type NiO was formed on n-type ZnO by using reactive sputtering method. The indium tin oxide (ITO) which is transparent conducting oxide (TCO) was applied as a transparent electrode for transporting electrons. To improve the UV photodetector performance, a functional $SnO_2$ layer was selected as an electron transporting and hole blocking layer, which actively controls the carrier movement, between ZnO and ITO. The photodetector (NiO/ZnO/$SnO_2$/ITO) shows transmittance over 50% as similar as the transmittance of a general device (NiO/ZnO/ITO) due to the high transmittance of $SnO_2$ for broad wavelengths. The functional $SnO_2$ layer for band alignment effectively enhances the photo-current to be $15{\mu}A{\cdot}cm^{-2}$ (from $7{\mu}A{\cdot}cm^{-2}$ of without $SnO_2$) with the quick photo-responses of rise time (0.83 ms) and fall time (15.14 ms). We demonstrated the all transparent UV photodetector based on ZnO and suggest the route for effective designs to enhance performance for transparent photoelectric applications.

• Current Photovoltaic Research
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• v.3 no.4
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• pp.130-134
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• 2015

The high efficiency cell research processes through the KF post deposition treatment (PDT) of the $Cu(In,Ga)Se_2(CIGS)$ thin film has been very actively progress. In this study, it CIGS thin film deposition process when KF PDT 300 to the processing temperature, 350, $400^{\circ}C$ changed to soda-lime glass (SLG) efficiency of the CIGS thin film characteristics, and solar cell according to Na presence of diffusion from the substrate the effects were analyzed. As a result, the lower the temperature of KF PDT and serves to interrupt the flow of current K-CIGS layer is not removed from the reaction surface, FF and photocurrent is decreased significantly. Blocking of the Na diffusion from the glass substrate is significantly increased while the optical voltage, photocurrent and FF is a low temperature (300, $350^{\circ}C$) in the greatly reduced, and in $400^{\circ}C$ tend to reduce fine. It is the presence of Na in CIGS thin film by electron-induced degradation of the microstructure of CIGS thin film is expected to have a significant impact on increasing the hole recombination rate a reaction layer is formed of the K elements in the CIGS thin film surface.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.15 no.6
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• pp.4013-4018
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• 2014

A 0.45 $cm^2$ DSSC device with a glass/FTO/blocking layer/$TiO_2$/N719(dye)/electrolyte/50 nm-Pt/50 nm-Au/FTO/glass was prepared to examine the stability of the Au/Pt bilayered counter electrode (CE) with electrolyte and the energy conversion efficiency (ECE) of dye-sensitized solar cells (DSSCs). For comparison, a 100 nm-thick Pt only CE DSSC was also prepared using the same method. The photovoltaic properties, such as the short circuit current density ($J_{sc}$), open circuit voltage ($V_{oc}$), fill factor (FF), and ECE, were checked using a solar simulator and potentiostat with time after assembling the DSSC. The microstructure of the Au/Pt bilayer was examined by optical microscopy after 0~25 minutes. The ECE of the Pt only CE-employed DSSC was 4.60 %, which did not show time dependence. On the other hand, for the Au/Pt CE DSSC, the ECEs after 0, 5 and 15 minutes were 5.28 %, 3.64 % and 2.09 %, respectively. The corrosion areas of the Au/Pt CE determined by optical microscopy after 0, 5, and 25 minutes were 0, 21.92 and 34.06 %. These results confirmed that the ECE and catalytic activity of Au/Pt CE decreased drastically with time. Therefore, a Au/Pt CE-employed DSSC may be superior to the Pt only CE-employed one immediately after integration of the device, but it would degrade drastically with time.

• Korean Journal of Materials Research
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• v.19 no.9
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• pp.462-467
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• 2009

The Charge Trap Flash (CTF) memory device is a replacement candidate for the NAND Flash device. In this study, Pt/$Al_2O_3/La_2O_3/SiO_2$/Si multilayer structures with lanthanum oxide charge trap layers were fabricated for nonvolatile memory device applications. Aluminum oxide films were used as blocking oxides for low power consumption in program/erase operations and reduced charge transports through blocking oxide layers. The thicknesses of $SiO_2$ were from 30 $\AA$ to 50 $\AA$. From the C-V measurement, the largest memory window of 1.3V was obtained in the 40 $\AA$ tunnel oxide specimen, and the 50 $\AA$ tunnel oxide specimen showed the smallest memory window. In the cycling test for reliability, the 30 $\AA$ tunnel oxide sample showed an abrupt memory window reduction due to a high electric field of 9$\sim$10MV/cm through the tunnel oxide while the other samples showed less than a 10% loss of memory window for $10^4$ cycles of program/erase operation. The I-V measurement data of the capacitor structures indicated leakage current values in the order of $10^{-4}A/cm^2$ at 1V. These values are small enough to be used in nonvolatile memory devices, and the sample with tunnel oxide formed at $850^{\circ}C$ showed superior memory characteristics compared to the sample with $750^{\circ}C$ tunnel oxide due to higher concentration of trap sites at the interface region originating from the rough interface.

• ETRI Journal
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• v.35 no.3
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• pp.425-430
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• 2013

In this paper, we propose a triple-gate trench power MOSFET (TGRMOS) that is made through a modified RESURF stepped oxide (RSO) process, that is, the nitride_RSO process. The electrical characteristics of TGRMOSs, such as the blocking voltage ($BV_{DS}$) and on-state current ($I_{D,MAX}$), are strongly dependent on the gate configuration and its bias condition. In the nitride_RSO process, the thick single insulation layer ($SiO_2$) of a conventional RSO power MOSFET is changed to a multilayered insulator ($SiO_2/SiN_x/TEOS$). The inserted $SiN_x$ layer can create the selective etching of the TEOS layer between the gate oxide and poly-Si layers. After additional oxidation and the poly-Si filling processes, the gates are automatically separated into three parts. Moreover, to confirm the variation in the electrical properties of TGRMOSs, such as $BV_{DS}$ and $I_{D,MAX}$, simulation studies are performed on the function of the gate configurations and their bias conditions. $BV_{DS}$ and $I_{D,MAX}$ are controlled from 87 V to 152 V and from 0.14 mA to 0.24 mA at a 15-V gate voltage. This $I_{D,MAX}$ variation indicates the specific on-resistance modulation.

• Korean Journal of Materials Research
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• v.19 no.5
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• pp.240-244
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• 2009

Simple and high efficiency green phosphorescent devices using an intermixed double host of 4, 4', 4"-tris(N-carbazolyl) triphenylamine [TCTA], 1, 3, 5-tris (N-phenylbenzimiazole-2-yl) benzene [TPBI], phosphorescent dye of tris(2-phenylpyridine)iridium(III) [$Ir(ppy)_3$], and selective doping in the TPBI region were fabricated, and their electro luminescent characteristics were evaluated. In the device fabrication, layers of $70{\AA}$-TCTA/$90{\AA}$-$TCTA_[0.5}TPBI_{0.5}$/$90{\AA}$-TPBI doped with $Ir(ppy)_3$ of 8% and an undoped layer of $50{\AA}$-TPBI were successively deposited to form an emission region, and SFC137 [proprietary electron transporting material] with three different thicknesses of $300{\AA}$, $500{\AA}$, and $700{\AA}$ were used as an electron transport layer. The device with $500{\AA}$-SFC137 showed the luminance of $48,300\;cd/m^2$ at an applied voltage of 10 V, and a maximum current efficiency of 57 cd/A under a luminance of $230\;cd/m^2$. The peak wavelength in the electroluminescent spectral and color coordinates on the Commission Internationale de I'Eclairage [CIE] chart were 512 nm and (0.31, 0.62), respectively.