• Title/Summary/Keyword: Current Sharing

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Wireless parallel operation of high voltage DC power supply using steady-state estimation (정상상태 판별을 이용한 고전압 직류전원장천의 Wireless 병렬 운전)

  • Son, H.S.;Baek, J.W.;Yoo, D.W.;Kim, J.M.;Kim, H.G.
    • Proceedings of the KIEE Conference
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    • 2003.04a
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    • pp.208-211
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    • 2003
  • This paper presents an improved droop method of the high voltage DC power supply which minimizes the voltage droop of a parallel-connected power supply. Conventionally, the droop method has been used to achieve a simple structure and no-interconnections among the power sources. However, it has a trade-off between output voltage regulation and load sharing accuracy. In this paper, the droop is minimized with a current and droop gain control using steady-stage estimation. The proposed method can achieve both high performance voltage regulation and load sharing. Two 10kV, 100mA parallel power modules were made and tested to verify the proposed current-sharing method.

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Wireless Parallel Operation of High Voltage DC Pourer Supply using Steady-state Estimation (정상상태 판별을 이용한 고전압전원장치의 Wireless 병렬운전)

  • 백주원;유동욱;손호섭;김장목
    • The Transactions of the Korean Institute of Electrical Engineers B
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    • v.53 no.4
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    • pp.255-261
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    • 2004
  • This paper presents an improved droop method which minimizes the voltage droop of a parallel-connected power supply Conventionally, the droop method has been used to achieve a simple structure and no-interconnections among power sources. However, it has a trade-off between output voltage regulation and load sharing accuracy In this paper, the droop is minimized with a current and droop gain control using steady-stage estimation. The proposed method can achieve both good voltage regulation and good load sharing. A design example of two 10㎸, 100㎃ parallel modules is made and tested to verify the proposed current-sharing method.

Comparative Study of Current or Time Sharing Switches for DC/DC Converters (DC/DC 컨버터용 전류분할과 시분할 스위칭 기법의 비교)

  • Park, Chun-Sung;Kwon, Hyuk-Dae;Ko, Sung-Hun;Lee, Su-Won;Lee, Seong-Ryong;Jeon, Chil-Whan
    • Proceedings of the KIEE Conference
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    • 2007.07a
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    • pp.1153-1154
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    • 2007
  • 본 논문에서는 DC/DC 컨버터의 병렬운전에 사용되는 전류분할(current sharing)기법과 시분할(time sharing)기법을 비교.분석하였다. 고전력 전력변환기(컨버터 or 인버터)에 사용되는 전력용 반도체 소자(스위칭 소자)를 낮은 용량의 스위칭 소자 여러 개로 구성하면 전체 시스템의 원가절감, 용량증대, 스위칭 손실 및 스트레스 감소 등의 효과를 얻을 수 있다. 본 연구에서는 효율, 스위칭 손실 및 스트레스의 관점에서 병렬운전에 사용되는 2가지 스위칭 기법을 비교 분석하기 위해 1[kW]급의 벅-타입의 DC/DC 컨버터를 제작하여 실험하였다.

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A 16-channel Neural Stimulator IC with DAC Sharing Scheme for Artificial Retinal Prostheses

  • Seok, Changho;Kim, Hyunho;Im, Seunghyun;Song, Haryong;Lim, Kyomook;Goo, Yong-Sook;Koo, Kyo-In;Cho, Dong-Il;Ko, Hyoungho
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.14 no.5
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    • pp.658-665
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    • 2014
  • The neural stimulators have been employed to the visual prostheses system based on the functional electrical stimulation (FES). Due to the size limitation of the implantable device, the smaller area of the unit current driver pixel is highly desired for higher resolution current stimulation system. This paper presents a 16-channel compact current-mode neural stimulator IC with digital to analog converter (DAC) sharing scheme for artificial retinal prostheses. The individual pixel circuits in the stimulator IC share a single 6 bit DAC using the sample-and-hold scheme. The DAC sharing scheme enables the simultaneous stimulation on multiple active pixels with a single DAC while maintaining small size and low power. The layout size of the stimulator circuit with the DAC sharing scheme is reduced to be 51.98 %, compared to the conventional scheme. The stimulator IC is designed using standard $0.18{\mu}m$ 1P6M process. The chip size except the I/O cells is $437{\mu}m{\times}501{\mu}m$.

Exploring Determinants of Performance Indicator and Customer Satisfaction of Accommodation Sharing

  • CHO, Yooncheong
    • The Journal of Asian Finance, Economics and Business
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    • v.7 no.3
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    • pp.201-210
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    • 2020
  • The study aims to investigate determinants of performance indicator and perceptions of existing and potential customers in accommodation sharing. This study uses data of Airbnb in Busan and Jeju from January 1 to December 31 in 2018, provided by AirDNA. The total number of listed accommodation sharing were 5,109 accommodations in Busan and 11,502 accommodations in Jeju. More than 90 property types of registered accommodation are subcategorized and re-classified in this study. Study 1 examined current usage and effects of factors on performance indicator in tourism destinations by applying Airbnb data. Study 2 investigated effects of perceived factors on satisfaction, intention to use, loyalty, and tourism competitiveness by applying online survey data. This study applies statistical analyses such as factor and regression analyses, ANOVA, t-test, and MANOVA. Results of Study 1 showed that usage and effects of accommodation sharing differ from regulation that is related to sharing types. Effects also differ based on travel destinations. Results of Study 2 showed how customers perceive accommodation sharing differ from pure meaning of sharing. The results of Study 1 and 2 found significant effects of price and service factors on performance indicator and customer satisfaction. The findings of Study 2 showed significant effects on loyalty and tourism competitiveness.

Load-Sharing Algorithm using Digital Parallel Communication (디지털 병렬 통신을 이용한 부하분담 알고리즘)

  • Park, Seong-Mi;Kim, Chun-Sung;Lee, Sang-Hyeok;Lee, Sang-Hun;Park, Sung-Jun;Lee, Bae-Ho
    • The Transactions of the Korean Institute of Power Electronics
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    • v.16 no.1
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    • pp.50-57
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    • 2011
  • In this paper, we proposes a new load-sharing algorithm with a ATmega2560 based digital communication. Proposed algorithm is different from conventional analog method. The high speed communication digital control is performed. To apply the digital communication and real-time control for time-sharing token bus method, we implemented high efficient load-sharing and redundancy. Also this system make down the price by auto ID algorithm and system response is improved by controller's voltage and current integral value sharing. In parallel system prototype, each module have controller and performed load-sharing according to master module integral value. In this paper, we verify the validity of proposed algorithm using PSIM program and prototype.

Zero Torque Control of Switched Reluctance Motor for Integral Charging (충전기 겸용 스위치드 릴럭턴스 전동기의 제로토크제어)

  • Rashidi, A.;Namazi, M.M;Saghaian, S.M.;Lee, D.H.;Ahn, J.W.
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.66 no.2
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    • pp.328-338
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    • 2017
  • In this paper, a zero torque control scheme adopting current sharing function (CSF) used in integrated Switched Reluctance Motor (SRM) drive with DC battery charger is proposed. The proposed control scheme is able to achieve the keeping position (KP), zero torque (ZT) and power factor correction (PFC) at the same time with a simple novel current sharing function algorithm. The proposed CSF makes the proper reference for each phase windings of SRM to satisfy the total charging current of the battery with zero torque output to hold still position with power factor correction, and the copper loss minimization during of battery charging is also achieved during this process. Based on these, CSFs can be used without any recalculation of the optimal current at every sampling time. In this proposed integrated battery charger system, the cost effective, volume and weight reduction and power enlargement is realized by function multiplexing of the motor winding and asymmetric SR converter. By using the phase winding as large inductors for charging process, and taking the asymmetric SR converter as an interleaved converter with boost mode operation, the EV can be charged effectively and successfully with minimum integral system. In this integral system, there is a position sliding mode controller used to overcome any uncertainty such as mutual inductance or DC offset current sensor. Power factor correction and voltage adaption are obtained with three-phase buck type converter (or current source rectifier) that is cascaded with conventional SRM, one for wide input and output voltage range. The practicability is validated by the simulation and experimental results by using a laboratory 3-hp SRM setup based on TI TMS320F28335 platform.

Implementation of a ZVS Three-Level Converter with Series-Connected Transformers

  • Lin, Bor-Ren
    • Journal of Power Electronics
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    • v.13 no.2
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    • pp.177-185
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    • 2013
  • This paper studies a soft switching DC/DC converter to achieve zero voltage switching (ZVS) for all switches under a wide range of load condition and input voltage. Two three-level PWM circuits with the same power switches are adopted to reduce the voltage stress of MOSFETs at $V_{in}/2$ and achieve load current sharing. Thus, the current stress and power rating of power semiconductors at the secondary side are reduced. The series-connected transformers are adopted in each three-level circuit. Each transformer can be operated as an inductor to smooth the output current or a transformer to achieve the electric isolation and power transfer from the input side to the output side. Therefore, no output inductor is needed at the secondary side. Two center-tapped rectifiers connected in parallel are used at the secondary side to achieve load current sharing. Due to the resonant behavior by the resonant inductance and resonant capacitance at the transition interval, all switches are turned on at ZVS. Experiments based on a 1kW prototype are provided to verify the performance of proposed converter.

Analysis, Design and Implementation of an Interleaved DC/DC Converter with Series-Connected Transformers

  • Lin, Bor-Ren;Chen, Chih-Chieh
    • Journal of Power Electronics
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    • v.12 no.4
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    • pp.643-653
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    • 2012
  • An interleaved DC/DC converter with series-connected transformers is presented to implement the features of zero voltage switching (ZVS), load current sharing and ripple current reduction. The proposed converter includes two half-bridge converter cells connected in series to reduce the voltage stress of the switches at one-half of the input voltage. The output sides of the two converter cells with interleaved pulse-width modulation are connected in parallel to reduce the ripple current at the output capacitor and to achieve load current sharing. Therefore, the size of the output chokes and the capacitor can be reduced. The output capacitances of the MOSFETs and the resonant inductances are resonant at the transition instant to achieve ZVS turn-on. In addition, the switching losses on the power switches are reduced. Finally, experiments on a laboratory prototype (24V/40A) are provided to demonstrate the performance of the proposed converter.