• The KIPS Transactions:PartA
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• 제12A권3호
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• pp.235-242
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• 2005

In this paper, we propose a new division circuit for $GF(2^m)$ applications. The proposed division circuit is based on a modified the binary GCD algorithm and produce division results at a rate of one per 2m-1 clock cycles. Analysis shows that the proposed circuit gives $47\%$ and $20\%$ improvements in terms of speed and hardware respectively. In addition, since the proposed circuit does not restrict the choice of irreducible polynomials and has regularity and modularity, it provides a high flexibility and scalability with respect to the field size m. Thus, the proposed divider. is well suited to low-area $GF(2^m)$ applications.

• KIPS Transactions on Software and Data Engineering
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• 제2권11호
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• pp.747-756
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• 2013

It is important to reduce unnecessary overhead in sensor network using battery. In addition encryption is important because of necessity of security. Since unavoidable overhead occurs in case of encryption, security and overhead are in trade-off condition. In this paper, we use a concept called trust to reduce the encryption overhead. We reduce overhead by controlling encryption key sizes while maintaining the security level where high and low trust nodes are mixed. We simulated and compared normal encryption and trust value based encryption. As a result, the latter has lower execution time and overhead. If we define a standard of trust levels considering purpose and circumstances of real network, we can use constrained resources efficiently in sensor network.

• Journal of the Korea Academia-Industrial cooperation Society
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• 제21권5호
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• pp.14-21
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• 2020

In order to provide confidential services between two communicating parties, block data encryption using a symmetric secret key is applied. A power analysis attack on a cryptosystem is a side channel-analysis method that can extract a secret key by measuring the power consumption traces of the crypto device. In this paper, we propose an attack model that can recover the secret key using a power analysis attack based on a deep learning convolutional neural network (CNN) algorithm. Considering that the CNN algorithm is suitable for image analysis, we particularly adopt the recurrence plot (RP) signal processing method, which transforms the one-dimensional power trace into two-dimensional data. As a result of executing the proposed CNN attack model on an XMEGA128 experimental board that implemented the AES-128 encryption algorithm, we recovered the secret key with 22.23% accuracy using raw power consumption traces, and obtained 97.93% accuracy using power traces on which we applied the RP processing method.

• Journal of KIISE:Computer Systems and Theory
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• 제35권9_10호
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• pp.441-451
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• 2008

Currently, the X.509 proxy certificate is widely used to delegate an entity's right to another entity in the computational grid environment. However it has two drawbacks: the potential security threat caused by intraceability of a delegation chain and the inefficiency caused by an interactive communication between the right grantor and the right grantee on the delegation protocol. To address these problems for computational grids, we propose a new delegation protocol without additional cost. We use an ID-based key generation technique to generate a proxy private key which is a means to exercise the delegated signing right. By applying the ID-based key generation technique, the proposed protocol has the delegation traceability and the non-interactive delegation property. Since the right delegation occurs massively in the computational grid environment, our protocol can contribute the security enhancement by providing the delegation traceability and the efficiency enhancement by reducing the inter-domain communication cost.

• Journal of the Korea Institute of Information and Communication Engineering
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• 제20권4호
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• pp.786-792
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• 2016

Camellia was jointly developed by Nippon Telegraph and Telephone Corporation and Mitsubishi Electric Corporation in 2000. Camellia specifies the 128-bit message block size and 128-, 192-, and 256-bit key sizes. In this paper, a modified round operation block which unifies a register setting for key schedule and a conventional round operation block is proposed. 16 ROMs needed for key generation and round operation are implemented using only 4 dual-port ROMs. Due to the use of a message buffer, encryption/decryption can be executed without a waiting time immediately after KA and KB are calculated. The suggested block cipher Camellia algorithm is designed using Verilog-HDL, implemented on Virtex4 device and operates at 184.898MHz. The designed cryptographic core has a maximum throughput of 1.183Gbps in 128-bit key mode and that of 876.5Mbps in 192 and 256-bit key modes. The cryptographic core of this paper is applicable to security module of the areas such as smart card, internet banking, e-commerce and satellite broadcasting.

• The Journal of Korean Institute of Communications and Information Sciences
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• 제31권1C호
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• pp.87-92
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• 2006

An $AB^2$ modular operation is an efficient basic operation for the public key cryptosystems and various systolic architectures for $AB^2$ modular operation have been proposed. However, these architectures have a shortcoming for cryptographic applications due to their high area complexity. Accordingly, this paper presents an partitioned $AB^2$ systolic modular multiplier over GF($2^m$). A dependency graph from the MSB $AB^2$ modular multiplication algorithm is partitioned into 1/3 to get an partitioned $AB^2$ systolic multiplier. The multiplier reduces the area complexity about 2/3 compared with the previous multiplier. The multiplier could be used as a basic building block to implement the modular exponentiation for the public key cryptosystems based on smartcard which has a restricted hardware requirements.

• The Journal of Korean Institute of Communications and Information Sciences
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• 제28권7A호
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• pp.547-556
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• 2003

This paper proposes a novel arithmetic unit over GF(2$^{m}$ ) for low-area elliptic curve cryptographic processor. The proposed arithmetic unit, which is linear feed back shift register (LFSR) architecture, is designed by using hardware sharing between the binary GCD algorithm and the most significant bit (MSB)-first multiplication scheme, and it can perform both division and multiplication in GF(2$^{m}$ ). In other word, the proposed architecture produce division results at a rate of one per 2m-1 clock cycles in division mode and multiplication results at a rate of one per m clock cycles in multiplication mode. Analysis shows that the computational delay time of the proposed architecture, for division, is less than previously proposed dividers with reduced transistor counts. In addition, since the proposed arithmetic unit does not restrict the choice of irreducible polynomials and has regularity and modularity, it provides a high flexibility and scalability with respect to the field size m. Therefore, the proposed novel architecture can be used for both division and multiplication circuit of elliptic curve cryptographic processor. Specially, it is well suited to low-area applications such as smart cards and hand held devices.

• The Journal of Korean Institute of Communications and Information Sciences
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• 제36권10C호
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• pp.614-620
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• 2011

RSA, the most commonly used public-key cryptosystem, is based on the difficulty of factoring very large integers. The fastest known factoring algorithm is the Number Field Sieve(NFS). NFS first chooses two polynomials having common root modulo N and consists of the following four major steps; 1. Polynomial Selection 2. Sieving 3. Matrix 4. Square Root, of which the most time consuming step is the Sieving step. However, in recent years, the importance of the Polynomial Selection step has been studied widely, because one can save a lot of time and memory in sieving and matrix step if one chooses optimal polynomial for NFS. One of the ideal ways of choosing sieving polynomial is to choose two polynomials with same degree. Montgomery proposed the method of selecting two (nonlinear) quadratic sieving polynomials. We proposed two cubic polynomials using 5-term geometric progression.

• The Journal of Korean Institute of Communications and Information Sciences
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• 제29권5C호
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• pp.726-736
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• 2004

In this paper, we proposed a new scalar multiplier structure needed for an elliptic curve cryptosystem(ECC) over the standard basis in GF(2$^{163}$ ). It consists of a bit-serial multiplier and a divider with control logics, and the divider consumes most of the processing time. To speed up the division processing, we developed a new division algorithm based on the extended Euclid algorithm. Dynamic data dependency of the Euclid algorithm has been transformed to static and fixed data flow by a localization technique, to make it independent of the input and field polynomial. Compared to other existing scalar multipliers, the new scalar multiplier requires smaller gate counts with improved processor performance. It has been synthesized using Samsung 0.18 um CMOS technology, and the maximum operating frequency is estimated 250 MHz. The resulting performance is 148 kbps, that is, it takes 1.1 msec to process a 163-bit data frame. We assure that this performance is enough to be used for digital signature, encryption/decryption, and key exchanges in real time environments.

• The Journal of Korean Institute of Communications and Information Sciences
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• 제31권12C호
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• pp.1297-1308
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• 2006

Multiplications in finite fields are one of the most important arithmetic operations for implementations of elliptic curve cryptographic systems. In this paper, we propose a new multiplication algorithm and VLSI architecture over $GF(2^m)$ using Gaussian normal basis. The proposed algorithm is designed by using a symmetric property of normal elements multiplication and transforming coefficients of normal elements. The proposed multiplication algorithm is applicable to all the five recommended fields $GF(2^m)$ for elliptic curve cryptosystems by NIST and IEEE 1363, where $m\in${163, 233, 283, 409, 571}. A new VLSI architecture based on the proposed multiplication algorithm is faster or requires less hardware resources compared with previously proposed normal basis multipliers over $GF(2^m)$. In addition, we gives an easy method finding a basic multiplication matrix of normal elements.