• The KIPS Transactions:PartC
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• v.10C no.7
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• pp.929-936
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• 2003

We Propose the Suity Cryptography File System to encrypt or decrypt a plaintext or an encrypted tort by using the dynamic linking mechanism In the Linux kernel. The dynamic linking mechanism gives the flexibility of the kernel without changing the kernel. The Sorority Cryptography File System uses the blowfish algorithm to encrypt or decrypt a data. To overcome the overhead of the key server, I use key generating algorithm which is installed in the same Security Cryptography File System. The Security Cryptography file System is fitted into the Linux system.

• The KIPS Transactions:PartC
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• v.12C no.2 s.98
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• pp.201-206
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• 2005

This paper designs Cryptography File System to support encrypting function. The CFS is supported in Solaris Kernel to encrypt or decrypt a plaintext or an encrypted text by using the dynamic linking mechanism. The Cryptography File System supports safe use of computer system even if an intruder gets a file by connecting with network. If he/she does not have a Cryptography File System module in the Solaris Kernel, he/she cannot read that file. The Cryptography File System was experimented into the Solaris kernel.

• ETRI Journal
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• v.43 no.6
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• pp.1113-1129
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• 2021

Lightweight ciphers are increasingly employed in cryptography because of the high demand for secure data transmission in wireless sensor network, embedded devices, and Internet of Things. The PRESENT algorithm as an ultralightweight block cipher provides better solution for secure hardware cryptography with low power consumption and minimum resource. This study generates the key using key rotation and substitution method, which contains key rotation, key switching, and binary-coded decimal-based key generation used in image encryption. The key rotation and substitution-based PRESENT architecture is proposed to increase security level for data stream and randomness in cipher through providing high resistance to attacks. Lookup table is used to design the key scheduling module, thus reducing the area of architecture. Field-programmable gate array (FPGA) performances are evaluated for the proposed and conventional methods. In Virtex 6 device, the proposed key rotation and substitution PRESENT architecture occupied 72 lookup tables, 65 flip flops, and 35 slices which are comparably less to the existing architecture.

• The Magazine of the IEIE
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• v.30 no.6
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• pp.624-637
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• 2003

CMVP(Cryptographic Module Validation Program) validates cryptographic modules to FIPS 140-1, 2, and other FIPS cryptography based standards. This paper gives an overview of the CMVP, cryptographic modules, cryptographic algorithms, and the applicable standards. This provides a brief overview of the security requirements that must be met by each cryptographic module that is submitted to a CMT laboratory for conformance testing and describes the Cryptographic Algorithm Testing.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.12 no.1
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• pp.255-262
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• 2011

The advancement of information and communication technology has caused a few dysfunction such as hacking. To keep an organization from a harmful hacking, demands for cryptographic modules have been increased. However, the evaluation criteria of cryptographic modules in Korea have been less firmly established. It is difficult for the consumers of cryptographic module to choose an appropriate cryptographic module, and to establish interoperability between applications and cryptographic modules. This study analyzes evaluation criteria, evaluation processes and evaluation policy of CMVP(Cryptographic Module Verification Program) in the advanced countries. The paper suggests a policy for Korea CMVP, in resulting a provision of foundations for international standard and cooperations for international cryptographic policies and systems.

• Journal of KIISE:Computer Systems and Theory
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• v.30 no.9
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• pp.494-503
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• 2003

In this paper, we propose the implementation techniques of IC card chipset that is compatible with international standard ISO-7816 and supports WindowsCE operating system to expropriate various electronic cash and credit card. This IC card interface chip set is composed with 32 bit ARM720T Core and AES(Advanced Encryption System) cryptography module for electronic commerce. Six IC card interfaces support T=0, T=1 protocol and two of them are used to interface with user card directly, the others are used for interface with SAM card. In addition, It supports a LCD controller and USB interface for host. We improved the performance about 70% than software based It card chip set and verified using Hynix 0.35um process.

• Proceedings of the Korea Information Processing Society Conference
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• 2013.11a
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• pp.790-792
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• 2013

정보화 시대가 빠르게 발전함에 따라 스마트 그리드 및 CCTV등 유 무선 통신망을 이용한 다양한 분야의 서비스가 이루어지고 있다. 이러한 서비스를 제공하는데 있어서 민감한 내용을 포함한 정보가 존재한다면 데이터에 대한 보안은 중요한 요소 일 것이다. 현재 보안기능이 탑재되어 있지 않은 장치에 보안 기능을 탑재하기 위해서는 하드웨어적인 요소를 추가 혹은 교체하거나 소프트웨어 또는 펌웨어 업데이트 방식을 선택하여 보안 기능을 추가할 수 있다. 본 논문에서는 소프트웨어 업데이트를 통하여 보안 기능을 제공하는 방식에 대해서 설명하며 범용적인 x86아키텍처와 ARM9아키텍처를 비교 분석하여 아키텍처 환경별 암호모듈 적용방안을 제시하고자 한다.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.24 no.4
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• pp.593-605
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• 2014

In this paper, we propose the efficient HW/SW co-design method of light-weight cryptography such as HIGHT, PRESENT and PRINTcipher using GEZEL. At first the symmetric cryptographic algorithms were designed using the GEZEL language which is efficiently used for HW/SW co-design. And for the improvement of performance the HW optimization theory such as unfolding, retiming and so forth were adapted to the cryptographic HW module conducted by FSMD. Also, the operation modes of those algorithms were implemented using C language in 8051 microprocessor, it can be compatible to various platforms. For providing reliable communication between HW/SW and preventing the time delay the improved handshake protocol was chosen for enhancing the performance of the connection between HW/SW. The improved protocol can process the communication-core and cryptography-core on the HW in parallel so that the messages can be transmitted to SW after HW operation and received from SW during encryption operation.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.28 no.1
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• pp.73-83
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• 2018

There has been increasing interest from NIST and other companies in studying post-quantum cryptography in order to resist against quantum computers. Multivariate polynomial based, code based, lattice based, hash based digital signature, and isogeny based cryptosystems are one of the main categories in post quantum cryptography. Among these categories, isogeny based cryptosystem is known to have shortest key length. In this paper, we implemented Supersingular Isogeny Diffie-Hellman (SIDH) protocol efficiently on low-end mobile device. Considering the device's specification, we select supersingular curve on 523 bit prime field, and generate efficient isogeny computation tree. Our implementation of SIDH module is targeted for 32bit environment.

• JSTS:Journal of Semiconductor Technology and Science
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• v.17 no.3
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• pp.425-437
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• 2017

For efficient hardware (HW) implementation of elliptic curve cryptography (ECC), various sub-modules for the underlying finite field operations should be implemented efficiently. Among these sub-modules, modular inversion (MI) requires the most computation; therefore, its performance might be a dominant factor of the overall performance of an ECC module. To determine the most efficient MI algorithm for an HW ECC module, we implement various classes of MI algorithms and analyze their performance. In contrast to the common belief in previous research, our results show that the right-shift binary inversion (RS) algorithm performs well when implemented in hardware. In addition, we present optimization methods to reduce the area overhead and improve the speed of the RS algorithm. By applying these methods, we propose a new RS-variant that is both fast and compact. The proposed MI module is more than twice as fast as the other two classes of MI: shifting Euclidean (SE) and left-shift binary inversion (LS) algorithms. It consumes only 15% more area and even 5% less area than SE and LS, respectively. Finally, we show that how our new method can be applied to optimize an HW ECC module.