• Journal of Power Electronics
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• v.14 no.5
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• pp.908-917
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• 2014

For the purpose of designing an intrinsic safety Flyback converter with minimal output voltage ripple based on a specified output current, this paper first classified the energy transmission modes of the system into three sorts, namely, the Complete Inductor Supply Mode-CCM (CISM-CCM), the Incomplete Inductor Supply Mode-CCM (IISM-CCM) and the Incomplete Inductor Supply Mode-DCM (IISM-DCM). Then, the critical secondary self-inductance assorting the three modes are deduced and expressions of the output voltage ripples (OVR) are presented. For a Flyback converter with constant loads and switching frequency, it is shown that the output voltage ripple in the CISM-CCM is the smallest and that it has no relationship with the secondary self-inductance. Otherwise, the OVR of the other two modes are bigger than the previously mentioned one. It is concluded that the critical inductance between the CISM-CCM and the IISM-CCM is the minimal secondary self-inductance to ensure the smallest output voltage ripple. At last, a design method to guarantee the minimum OVR within the scales of the input voltage and load are analyzed, and the minimum secondary self-inductance is proposed to minimize the OVR. Simulations and experiments are given to verify the results.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.60 no.6
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• pp.1134-1139
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• 2011

When the aspect ratio of a magnet varies, the magnetic field in the magnet also varies. The critical current of a tape-shaped HTS wire varies with the direction and magnitude of applied magnetic field. Consequently when the aspect ration of a HTS magnet varies, the critical current of a HTS magnet varies. This paper shows the relation between the aspect ratio of a magnet and the energy and inductance of a HTS magnet. The critical current is also shown at various aspect ratio of the magnet. The length of the HTS wire, inner diameter of the magnet, and number of pancake are chosen to be variables which varies the shape of the magnet. For a HTS magnet consisting of pancake windings, calculation results show the number of pancake windings are the prime factor which varied the energy and inductance of the magnet. The inner diameter of the magnet varies the energy and inductance of the magnet a little.

• The Transactions of the Korean Institute of Electrical Engineers A
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• v.55 no.6
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• pp.255-258
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• 2006

We investigated the operating characteristics of the hybrid-type superconducting fault current limiter (SFCL) according to the inductance of secondary windings. The hybrid type SFCL consists of a transformer that has a primary winding and a secondary winding with serially connected $YBa_2Cu_3O_7$ (YBCO) films. The resistive-type SFCL has difficulty when it comes to raising the capacity of the SFCL due to slight differences of critical current densities between units and structure of the SFCL. The hybrid-type SFCL with closed-loop is able to achieve capacity increase through the electrical isolation and reduction of the inductance of the secondary winding with a superconducting element of the same critical current. On the other hand, the current limiting characteristics were nearly identical in the hybrid-type SFCL with open-loop compared to closed-loop, but quench time was longer than the hybrid-type SFCL with closed-loop. We confirmed that the capacity of the SFCL was increased effectively by the reduced inductance of the secondary winding. In addition, the power burden of the system also could be lowered by reducing the inductance of secondary winding.

• Journal of Power Electronics
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• v.11 no.6
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• pp.793-800
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• 2011

This paper investigates the operational modes of buck dc-dc converters and their energy transmission methods. The operational modes of such converters are classified in two types, discontinuous conduction mode (DCM) and continuous conduction mode (CCM). In this paper, the critical inductance relation of DCM and CCM is determined. The equations of the output voltage ripple (OVR) for each mode are obtained for a specific input voltage and load resistance range. The maximum output voltage ripple (MOVR) is also obtained for each mode. The filter size is decreased and the minimum required inductance value is calculated to guarantee the minimization of the MOVR. The experimental and simulation results in PSCAD/EMTDC prove the correctness of the presented theoretical concepts.

• The Transactions of the Korean Institute of Power Electronics
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• v.21 no.3
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• pp.207-214
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• 2016

Magnetic circuit is a physical modeling method that is useful in designing and analyzing power transformers, especially for a priori evaluation of leakage and magnetizing inductance before actual production. In this study, a novel modeling approach that uses PSIM magnetic elements adopting gyrator and permeance-capacitances is investigated. A formula to determine the permeance-capacitors in the core and leakage path are established, and a simulation jig is devised to link the physical model and the electrical terminal characteristics with an automated parameter determination process. The derived formula is verified by measurement results of the prototype transformer samples. Given its accuracy and simplicity, this approach is suitable for analyzing and designing LLC resonant transformers whose leakage and magnetizing inductance are very critical to circuit operation.

• Progress in Superconductivity and Cryogenics
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• v.10 no.2
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• pp.30-33
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• 2008

Several kinds of superconducting fault current limiters (SFCLs), which reduces huge fault current, have been developing by many research groups. The SFCL has no impedance during normal operation, so it dose not give any influence to electric power system. The resistive type SFCL reduces the fault current with the impedance generated in the superconducting part of the SFCL when the fault current exceeds the critical current of SFCL. In this paper, a new type resistive SFCL made of bifilar coil wound with two different high-Tc superconducting (HTS) wires in parallel. Although a bifilar coil has theoretically no inductance, the bifilar coil made in this paper could generate inductance at fault. The specifications of the used two wires were considerably different, thus current distribution between the two HTS wire was different at fault. When the fault current exceeded the critical current of one wire in the bifilar coil, the momentary sharp increase of impedance was detected. Base on the results, a new resistive type SFCL can generate not only resistance but also inductance, which can be used to control a fault current in the future.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.05c
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• pp.15-17
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• 2002

Leakage inductance and temperature rise are two of the more impotent problems facing the magnetic core technology of today's high frequency transformers. Excessive leakage inductance increases the stress on the switching transistors and limits the duty-cycle, and excessive temperature rise can lead the design limitation of high frequency transformer with high current. The flat transformer technology provides a very good solution to the problems of leakage inductance and thermal management for high frequency power. The critical magnetic components and windings are optimized and packaged within a completely assembled module. The turns ratio in a flat transformer is determined as the product of the number of elements or modules times the number of primary turns. The leakage inductance increase proportionately to the number of elements, but since it is reduced as the square of the turns, the net reduction can be very significant. The flat transformer modules use cores which have no gap. This eliminates fringing fluxes and stray flux outside of the core. The secondary windings are formed of flat metal and are bonded to the inside surface of the core. The secondary winding thus surrounds the primary winding, so nearly all of the flux is captured.

• JSTS:Journal of Semiconductor Technology and Science
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• v.5 no.4
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• pp.255-261
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• 2005

With the advent of sub-90nm technologies, the system-on-chip (SoC) and system-in-package (SiP) are becoming the trend in delivering low-cost, low-power, and small-form-factor consumer electronic systems running at multiple GHz. The shortened transistor channel length reduces the transistor switching cycles to the range of several picoseconds, yet the time-of-flights of the critical on-chip and off-chip interconnects are in the range of 10 picoseconds for 1.5mm-long wires and 100 picoseconds for 15mm-long wires. Designers realize the bottleneck today often lies at chip-to-chip interconnects and the industry needs a good model to compute the inductance in these parts of circuits. In this paper we propose a new method for extracting accurate equivalent inductance circuit models for SPICE-level circuit simulations of system-on-chip (SoC) and system-in-package (SiP) designs. In our method, geometrical meshes are created and numerical methods are used to find the solutions for the electromagnetic fields over the fine meshes. In this way, multiple-GHz SoC and SiP designers can use accurate inductance modeling and interconnect optimization to achieve high yields.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.39 no.6
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• pp.545-556
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• 1990

A design method of a current source using 12-pulse phase-controlled rectifier (PCR) is presented. The critical inductance of the 12-pulse PCR is derived and it is shown that the critical inductance can be reduced using a current source. The control circuit of the 12-pulse PCR with an inner fast dynamic loop is proposed to give the frequency synchronism and to reduce the subharmonics due to the unbalance of the transformer of the power line. This circuit is analyzed and its dynamic loop is optimized. The optimal constant PIMF (proportional, integral and measurable variable feedback, and feedforware) controller is also designed using the time-weighted quadratic performance index. It is shown via experimental results that the proposed design method gives high dynamic and static performance of the current source using the 12-pulse PCR.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.48 no.4
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• pp.253-260
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• 1999

In this paper, the impedance characteristic of wire-plate pulsed plasma reactor was investigated by experiment. The experiment have carried out under the several conditions of voltage, wire length and wire-plate distance. The impedance of reactor wad decreased with increasing voltage and wire length. The nature of discharge in reactor was changed from streamer corona to spark with increasing incident energy, from which we understood the critical energy density between the two discharges. Fromthis experiment, we proposed the method for the impedance matching between pulse generator and pulsed plasma reactor. Additionally, we succeeded in the analysis ofstray inductance of 0.5MW reactor using EMTP (ElectroMagnetic Transients Program). This means that EMTP is also useful for the analysis of inevitable stray inductance of forthcoming a large scale reactor.