• Title/Summary/Keyword: CoreChart Software

Search Result 3, Processing Time 0.022 seconds

Research on Using Six Sigma Tool to Reduce the Core Process Time

  • Chung, Yi-Chan;Yen, Tieh-Min;Hsu, Yau-Wen;Tsai, Chih-Hung;Chen, Ching-Piao
    • International Journal of Quality Innovation
    • /
    • v.9 no.1
    • /
    • pp.94-102
    • /
    • 2008
  • When facing the global severe competition, the enterprises all try their best to upgrade the quality, reduce the costs to reach the goal of customer satisfaction. Motorola was the earliest firm creating the term Six Sigma (6 ${\sigma}$); GE was the enterprise successfully fulfilling Six Sigma. The success of these two firms revealed the prominent effects and became the world-class model enterprises. The main purpose of promoting Six Sigma activity was to reduce the possible defects in the business process to the least through designing and monitoring business process in order to reach the goals such as the best quality and efficiency, the lowest costs, the shortest circular process time, maximum profits and customer satisfaction. This research used the Six Sigma technique to improve the business process of ceramics manufacturing plant and find out the major factors of slower core task time by the analytical process of Process Mapping, Pareto Chart, Simu18 simulation software and figures and proposed the improvement measures. Through the confirmation of the case companies, it successfully reduced the core process time and the organizational costs and increased the capacity.

A Design and Implementation of a Timing Analysis Simulator for a Design Space Exploration on a Hybrid Embedded System (Hybrid 내장형 시스템의 설계공간탐색을 위한 시간분석 시뮬레이터의 설계 및 구현)

  • Ahn, Seong-Yong;Shim, Jea-Hong;Lee, Jeong-A
    • The KIPS Transactions:PartA
    • /
    • v.9A no.4
    • /
    • pp.459-466
    • /
    • 2002
  • Modern embedded system employs a hybrid architecture which contains a general micro processor and reconfigurable devices such as FPGAS to retain flexibility and to meet timing constraints. It is a hard and important problem for embedded system designers to explore and find a right system configuration, which is known as design space exploration (DSE). With DES, it is possible to predict a final system configuration during the design phase before physical implementation. In this paper, we implement a timing analysis simulator for a DSE on a hybrid embedded system. The simulator, integrating exiting timing analysis tools for hardware and software, is designed by extending Y-chart approach, which allows quantitative performance analysis by varying design parameters. This timing analysis simulator is expected to reduce design time and costs and be used as a core module of a DSE for a hybrid embedded system.

Implementation of User Interface for DNA Micro Array Printing Technology (DNA 마이크로어레이 프린팅을 위한 사용자 인터페이스 적용기술)

  • Park, Jae-Sam
    • The Journal of the Korea institute of electronic communication sciences
    • /
    • v.8 no.12
    • /
    • pp.1875-1882
    • /
    • 2013
  • Micro-array technology contributes numerous achievements such as ordering of gene network and integration of genomic. This technology is well established as means for investigating patterns of gene expression. DNA micro-arrays utilize Affymetric chips where a large quantity of DNA sequences may be synthesized. There are two general type of conventional DNA array spotter: contact and piezoelectric. The contact technology used spotting pin technology to make contact with the glass slide surface. This may caused damage or scratches to the surface matrix where protein will be contaminated and may not bind specifically. Piezoelectric technology available at this present time on the other hand requires the analyzer to print the result that can only be done within the laboratory despite of mass production. Therefore, in this paper, high-throughput technology is developed for providing greater consistency in feature spot without touching the glass slide surface.