• Nuclear Engineering and Technology
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• 제55권10호
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• pp.3732-3753
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• 2023

The Real-time Analysis for Particle-transport and In-situ Detection (RAPID) Code System, developed based on the Multi-stage Response-function Transport (MRT) methodology, enables real-time simulation of nuclear systems such as reactor cores, spent nuclear fuel pools and casks, and sub-critical facilities. This paper presents the application of a novel fission matrix-based burnup methodology to the well-characterized JSI TRIGA Mark II research reactor. This methodology allows for calculation of nuclear fuel depletion by combination and interpolation of RAPID's burnup dependent fission matrix (FM) coefficients to take into account core changes due to burnup. The methodology is compared to experimentally validated Serpent-2 Monte Carlo depletion calculations. The results show that the burnup methodology for RAPID (bRAPID) implemented into RAPID is capable of accurately calculating the k_eff burnup changes of the reactor core as the average discrepancies throughout the whole burnup interval are 37 pcm. Furthermore, capability of accurately describing 3D fission source distribution changes with burnup is demonstrated by having less than 1% relative discrepancies compared to Serpent-2. Good agreement is observed for axially and pin-wise dependent fuel burnup and nuclear fuel nuclide composition as a function of burnup. It is demonstrated that bRAPID accurately describes burnup in areas with high gradients of neutron flux (e.g. vicinity of control rods). Observed discrepancies for some isotopes are explained by analyzing the neutron spectrum. This paper presents a powerful depletion calculation tool that is capable of characterization of spent nuclear fuel on the fly while the reactor is in operation.

• 한국지진공학회논문집
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• 제13권2호
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• pp.37-46
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• 2009

본 연구에서는 1층 1경간 실제크기의 가력 프레임에서 내진보강에 적합한 비좌굴 knee brace을 설치하여 주기하중을 통해 가새의 지진저항능력을 실험하였다. 볼트 고정 채널이 이용된 비좌굴 knee brace는 지진력에 저항하는 코어와 두 개의 철골 플레이트로 만들어졌고 단면의 형태는 코어의 국부좌굴과 횡좌굴에 저항하도록 하였다. 비좌굴 kneebrace는 현장에서 조립이 용이하고, 시공방법 또한 간단하여 공간에 제약이 있는1층에 필로터를 가진 중저층 RC건물의 내진 보수/보강에 효과적으로 사용할 수 있다. 각 실험체에 대한 변수로 중심코어의 크기와 외부 보강재의 크기, 가이드 플레이트의 유무 등으로 정하였으며, 실험을 통해 얻어진 힘-변위 이력곡선을 통해 중심코어의 크기가 가장 큰 영향을 미치는 것으로 나타났다. 또한 가이드 플레이트의 유무에 따라 압축강도 수정계수와 파괴형태가 달라지는 것을 알 수 있었다. 각 실험체에 대한 결과는 AISC 2005 Seismic Provisions 규정에서 제시한 누적 연성도와 누적 소산에너지 측면에서도 충분한 효과를 발휘하는 것으로 나타났다.

• 대한기계학회:학술대회논문집
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• 대한기계학회 2004년도 추계학술대회
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• pp.383-387
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• 2004

The Fuel Test Loop (FTL) consists of In-Pile Test Section (IPS) and Out-of-Pile System (OPS). The test condition in IPS such as pressure, temperature and quality of the main cooling water, can be controlled by the OPS. The FTL has been developed to be able to irradiate three pins to the core irradiation hole (IR1 hole) by considering for its utility and user's irradiation requirement. The IPS vessel assembly (IVA) consists of IPS head, outer pressure vessel, inner pressure vessel, inner assembly and test fuel carrier. The IVA is approximately 5.6 m long and fits within a 74 mm in diameter envelope over the full height of the chimney. Above the top of the chimney, the head of the IPS is enlarged to allow the closure flanges and pipe work connections. IVA was designed to test the CANDU and PWR nuclear fuel pin together. Specially, wished to minimize interference by nuclear fuel change in design and synthesize these items and shape design for IVA.

• 한국기계가공학회지
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• 제14권6호
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• pp.7-13
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• 2015

The production processes were reviewed through the injection analysis of the shift lever as a core component of an auto lever installed in the automatic transmission of cars. The injection analysis was carried out for the shift lever and rod among the components in a shift lever module. The shift lever and rod are designed for injection molding with the insertion of a tube, a pin cable plate, and a steel rod for securing the strength of the product. The charging time, failure of injection molding, weld line, air trap, and deformation were reviewed according to this insert. Analyses on various gate positions were carried out for reviewing the cultivation and deformation of fiber around major components, such as the generation section of manipulation feeling and assembly section, so that optimal gate conditions might be reviewed and reflected in the mold design. Finally, we plan to compare the analysis results with the production of trial products.

• 한국염색가공학회:학술대회논문집
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• 한국염색가공학회 2011년도 제44차 학술발표회
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• pp.96-96
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• 2011

본 연구에서는 스포츠 캐주얼 웨어(스노우보드복, 골프복, 등산복 등)로 사용되는 신축성 소재의 개발로 Stretch성을 부여하기 위하여 Nylon 66 POY 소재의 가연가공 기술을 통하여 Mechanical Stretch 성능이 발현되는 소재를 개발하고자 한다. 섬유소재에 일반적으로 신축성을 부여하기 위해서는 Spandex(Polyurethane, PU)를 방적공정에서 복합 제조하는 Core Yarn과 장섬유에 Spandex를 피복하는 Covering Yarn(직물용) 형태가 있는데, Spandex로 인한 신축성은 200~800% 발현되나 PU를 사용함에 따라서 공정추가에 대한 원가상승, 균제도 불량, 몰림현상 및 PU 수축에 의한 중량감이 있으며, 또한 PU에 의한 견뢰도불량, 피복사의 벗겨짐성 등 외관상 트러블 발생빈도가 높다. 이에 따라 Spandex를 사용하지 않고 단일소재로서 사가공기술에 의해 Stretch성이 부여되는 소재를 개발하고 이의 기술을 상용화 하고자 한다. Nylon 66 POY 소재를 Disc 가연기, Pin 가연기 등의 설비를 이용하여 70d급 원사의 가연가공 공정을 진행하였다. 그리고 개발된 원사의 섬도(d), 강도(g/d), 신도(%), 크림프율(%)의 물성 시험을 통하여 Nylon66의 공정상 변화인자에 따른 기본 물성 및 Stretch 발현성을 분석하여 최적의 설비 및 공정조건을 확립하였다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1992년도 하계학술대회 논문집 B
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• pp.794-798
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• 1992

We present an optical Voltage and current sensor using $BSO(Bi_{12}SiO_{20})$ monocrystal. The voltage and current sensor consist of PBS(Polarizing Beam Splitter), 1/4 wavelength plate, ZnSe, Selfoc lens, LED, and PIN-PD etc. Magnetic core was made using permalloy for applying magnetic field to current sensor effectively. Current was measured from 100 to 1,600 ampere and accuracy was about ${\pm}$5%. The accuracy could be improved to ${\pm}$l% after reducing the nonlinear property of BSO crystal using our own program in PC (IBM286). We noticed that these data were not influenced by 154,000 voltage at all. Applied voltage was reduced to 1/20 using capacitors. And experiment was carried out up to 450V of the reduced voltage. The data fran optical voltage sensor was similar to that from conventional voltage sensor. The accuracy of the data was within about ${\pm}$1%.

• 전자공학회논문지C
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• 제35C권2호
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• pp.29-35
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• 1998

This paper describes architectures and design of a SIMD type parallel image processing chip called SliM-II. The chiphas a linear array of 64 processing elements (PEs), operates at 30 MHz in the worst case simulation and gives at least 1.92 GIPS. In contrast to existing array processors, such as IMAP, MGAP-2, VIP, etc., each PE has a multiplier that is quite effective for convolution, template matching, etc. The instruction set can execute an ALU operation, data I/O, and inter-PE communication simulataneously in a single instruction cycle. In addition, during the ALU/multiplier operation, SliM-II provides parallel move between the register file and on-chip memory as in DSP chips, SliM-II can greatly reduce the inter-PE communication overhead, due to the idea a sliding, which is a technique of overlapping inter-PE communication with computation. Moreover, the bandwidth of data I/O and inter-PE communication increases due to bit-parallel data paths. We used the COMPASS$^{TM}$ 3.3 V 0.6.$\mu$m standrd cell library (v8r4.10). The total number of transistors is about 1.5 muillions, the core size is 13.2 * 13.0 mm$^{2}$ and the package type is 208 pin PQ2 (Power Quad 2). The performance evaluation shows that, compared to a existing array processors, a proposed architeture gives a significant improvement for algorithms requiring multiplications.s.

• 한국정밀공학회지
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• 제24권5호
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• pp.82-88
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• 2007

This work is to fabricate a precise optical fiber array using polymer composite for optical interconnection. Optical fiber array has to satisfy low optical loss requirement less than 0.4 dB according to temperature change. For this purpose, design criteria for an optical fiber array was derived. The coefficient of thermal expansion of silica particulate epoxy composites was affected by volume fraction of silica particles. And also, elastic modulus of silica particulate epoxy composites was affected by volume fraction of silica particles. To obtain the coefficients of thermal expansion below $10{\times}10E-6/^{\circ}C$ and elastic modulus more than 20 GPa , we chose the volume fraction more than 76%. Using silica particulate epoxy composites with the volume fraction 76%, 8-channel optical fiber array with dimensional tolerances below $1\;{\mu}m$ was manufactured by transfer molding technique using dies with the uniquely-designed core pin and precisely-machined zirconia ceramic V block. These optical fiber arrays showed optical loss variations within 0.4 dB under thermal cycling test and high temperature test.

• Journal of Radiation Protection and Research
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• 제37권2호
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• pp.70-74
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• 2012

Silicon carbide (SiC) is a promising material for neutron detection at harsh environments because of its capability to withstand strong radiation fields and high temperatures. Two PIN-type SiC semiconductor neutron detectors, which can be used for nuclear power plant (NPP) applications, such as in-core reactor neutron flux monitoring and measurement, were designed and fabricated. As a preliminary test, MCNPX simulations were performed to estimate reaction probabilities with respect to neutron energies. In the experiment, I-V curves were measured to confirm the diode characteristic of the detectors, and pulse height spectra were measured for neutron responses by using a $^{252}Cf$ neutron source at KRISS (Korea Research Institute of Standards and Science), and a Tandem accelerator at KIGAM (Korea Institute of Geoscience and Mineral Resources). The neutron counts of the detector were linearly increased as the incident neutron flux got larger.

• 한국마이크로전자및패키징학회:학술대회논문집
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• 한국마이크로전자및패키징학회 2003년도 International Symposium
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• pp.109-119
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• 2003

o In order to start SIP Project .Marketing (& ASIC team) should present biz planning, schedule, device/SIP specs., in SIP TFT prior to request SIP development for package development project. .In order to prevent (PCB) revision, test, burn-in, & quality strategy should be fixed by SIP TFT (PE/Test, QA) prior to request for PKG development. .Target product price/cost, package/ test cost should be delivered and reviewed. o Minimum Information for PCB Design, Package Size, and Cost .(Required) package form factor: size, height, type (BGA, QFP), Pin count/pitch .(Estimated) each die size including scribe lane .(Estimated) pad inform. : count, pitch, configuration(in-line/staggered), (open) size .(Estimated) each device (I/O & Core) power (especially for DRAM embedded SIP) .SIP Block diagram, and net-list using excel sheet format o Why is the initial evaluation important\ulcorner .The higher logic power resulted in spec. over of DRAM Tjmax. This caused business drop longrightarrow Thermal simulation of some SIP product is essential in the beginning stage of SIP business planning (or design) stage. (i.e., DRAM embedded SIP) .When SIP is developed using discrete packages, the I/O driver Capa. of each device may be so high for SIP. Since I/O driver capa. was optimized to discrete package and set board environment, this resulted in severe noise problem in SIP. longrightarrow In this case, the electrical performance of product (including PKG) should have been considered (simulated) in the beginning stage of business planning (or design).