• 로봇학회논문지
• /
• 제18권1호
• /
• pp.122-126
• /
• 2023

An unexpected occlusion in a real life, not in a laboratory, can be more fatal to neural networks than expected. In addition, it is virtually impossible to create a network that learns all the environmental changes as well as occlusions. Therefore, we propose an alternative approach in which the architecture and number of parameters remain unchanged while adapting to occlusion circumstances. Learning method with the term Conversion Learning classifies them more robustly by converting the weights from various occlusion situations. The experiments on MNIST dataset showed a 3.07 [%p] performance improvement over the baseline CNN model in a situation where most objects are occluded and unknowing what occlusion will appear in advance. The experimental results suggest that Conversion Learning is an efficient method to respond to environmental changes such as occluded images.

• 한국인쇄학회지
• /
• 제18권1호
• /
• pp.103-112
• /
• 2000

The color space transformation to link device-dependent color spaces and device-independent color spaces is essential for device characterization and cross-media color reproduction. There are various color conversion methods such as regression, 3D interpolation with LUT(look-up table), and neural network. In the color transformation with these methods, the conversion accuracy is essentially based on the sample data to be exploited for device characterization. In conventional method, color samples are uniformly selected in device-dependent space such as CMY and RGB. However, distribution of these color samples is very non-uniform in device-independent color space such as CIEL*a*b*. Accordingly, the conversion error in device-independent color space is irregular according to the distribution of the samples. In this paper, a color sampling method based on equi-visual perception is proposed to obtain approximate uniform color samples in CIEL*a*b* space. In order to evaluate transformation accuracy of proposed method, color space transformations are simulated using regression, 3D interpolation with LUT and neural network techniques, respectively.

• 전력전자학회논문지
• /
• 제22권4호
• /
• pp.336-344
• /
• 2017

This paper presents the three-port DC-DC converter modeling and controller design procedure, which is part of the solid-state transformer (SST) to interface medium voltage AC grid to bipolar DC distribution network. Due to the high primary side DC link voltage, the proposed converter employs the three-level neutral point clamped (NPC) topology at the primary side and 2-two level half bridge circuits for each DC distribution network. For the proposed converter particular structure, this paper conducts modeling the three winding transformer and the power transfer between each port. A decoupling method is adopted to simplify the power transfer model. The voltage controller design procedure is presented. In addition, the output current sharing controller is employed for current balancing between the parallel-connected secondary output ports. The proposed circuit and controller performance are verified by experimental results using a 30 kW prototype SST system.

• 한국군사과학기술학회지
• /
• 제24권1호
• /
• pp.12-21
• /
• 2021

For successful automatic target recognition(ATR) with synthetic aperture radar(SAR) imagery, SAR target images of the database should have the identical or highly similar resolution with those collected from SAR sensors. However, it is time-consuming or infeasible to construct the multiple databases with different resolutions depending on the operating SAR system. In this paper, an approach for resolution conversion of SAR target images is proposed based on conditional generative adversarial network(cGAN). First, a number of pairs consisting of SAR target images with two different resolutions are obtained via SAR simulation and then used to train the cGAN model. Finally, the model generates the SAR target image whose resolution is converted from the original one. The similarity analysis is performed to validate reliability of the generated images. The cGAN model is further applied to measured MSTAR SAR target images in order to estimate its potential for real application.

• 대한전기학회:학술대회논문집
• /
• 대한전기학회 1987년도 전기.전자공학 학술대회 논문집(II)
• /
• pp.911-915
• /
• 1987

In this thesis, the architecture and design of IWS(Inter Working System) which interconnects two different networks (PSDN: Packet Switched Data Network, PSTN:Public Switched Telephone Network) are described. IWS provides interconnection services for the compatibility of communication between two networks. IWS consists of network interface protocols, protocol conversion facilities and management facilities.

• 대한전기학회:학술대회논문집
• /
• 대한전기학회 2011년도 제42회 하계학술대회
• /
• pp.1654-1655
• /
• 2011

This paper presents an algorithm applied to measure scattering parameters of a Multiport device with a 2-port Vector Network Analyzer (VNA). By employing the conversion of Scattering matrix with different reference impedances at ports, data obtained from 2-port configuration measurements can be synthesized to build the full scattering matrix of this device. A good agreement of estimated and measured parameters verified the performance of the algorithm.

• Management Science and Financial Engineering
• /
• 제11권2호
• /
• pp.85-103
• /
• 2005

In this paper, we consider the routing and wavelength assignment problem in survivable WDM transport network without wavelength conversion. We assume the single-link failure and a path protection scheme in optical layer. When a physical network and a set of working paths are given, the problem is to select a link-disjoint protection path for each working path and assign a wavelength for each working and protection path. We give an integer programming formulation of the problem and propose an algorithm to solve it. Though the formulation has exponentially many variables, we solve the linear programming relaxation of it by using column generation technique. We devise a branch-and price algorithm to solve the column generation problem. After solving the linear programming relaxation, we apply a variable fixing procedure combined with the column generation to get an integral solution. We test the proposed algorithm on some randomly generated data and test results show that the algorithm gives very good solutions.

• 대한전자공학회논문지
• /
• 제27권8호
• /
• pp.1255-1259
• /
• 1990

A new ripple analog-to-digital converter (ADC) has been developed. It consists of two parallel ADCs and a switching network. The circuit operates on the analog input signal in two serial steps. First, a coarse conversion is made to determine the most significant bits by the first parallel ADC. The resultant bits control the switching network to connect a series resistor segment, within which the analog signal is contained, to the second parallel ADC. At second step, a fine conversion is made to determine the least significant bits by the second parallel ADC. The circuit requires 2(2\ulcorner\ulcorner1) comparators, 2(2\ulcorner\ulcorner resistors, and 2(2\ulcorner\ulcorner swithches for N-bit resolution.

• IEIE Transactions on Smart Processing and Computing
• /
• 제5권5호
• /
• pp.349-357
• /
• 2016

The era of the Internet of Things (IoT) is upon us. In this era, minimizing power consumption becomes a primary concern for system-on-chip designers. While traditional power minimization and dynamic power management (DPM) techniques have been heavily explored to improve the power efficiency of devices inside very large-scale integration (VLSI) platforms, there is one critical factor that is often overlooked, which is the power conversion efficiency of a power delivery network (PDN). This paper is a tutorial that focuses on the power conversion efficiency of the PDN, and introduces novel methods to improve it. Circuit-, architecture-, and system-level approaches are presented to optimize PDN designs, while case studies for three different VSLI platforms validate the efficacy of the introduced approaches.

• 대한전기학회:학술대회논문집
• /
• 대한전기학회 1988년도 전기.전자공학 학술대회 논문집
• /
• pp.571-573
• /
• 1988

A new ripple analog-to-digital converter(ADC) has been developed. It consists of two parallel ADCs and a switching network. The circuit operates on the input signal in two serial steps. First a coarse conversion is made to determine the most significant bits by the first parallel ADC. The results control a switching network to connect the series resistor segment, the analog signal is contained within, to the second parallel ADC. At second step, a fine conversion is made to determine the least signification bits by the second parallel ADC. The circuit requires 2(2$\frac{N}{2}$) comparators, 2(2$\frac{N}{2}$) resistors, and 2(2$\frac{N}{2}$) switches for N-bit resolution.