• The Transactions of The Korean Institute of Electrical Engineers
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• v.62 no.1
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• pp.109-119
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• 2013

This paper presents the design of the Safety Programmable Logic Controller (SPLC) used in the Nuclear Power Plants, an analysis of a reliability for the SPLC using a markov model. The architecture of the SPLC is designed to have the multiple modular redundancy composed of the Dual Modular Redundancy(DMR) and the Triple Modular Redundancy(TMR). The operating system of the SPLC is designed to have the non-preemptive state based scheduler and the supervisory task managing the sequential scheduling, timing of tasks, diagnostic and security. The data communication of the SPLC is designed to have the deterministic state based protocol, and is designed to satisfy the effective transmission capacity of 20Mbps. Using Markov model, the reliability of SPLC is analyzed, and assessed. To have the reasonable reliability such as the mean time to failure (MTTF) more than 10,000 hours, the failure rate of each SPLC module should be less than $2{\times}10^{-5}$/hour. When the fault coverage factor (FCF) is increased by 0.1, the MTTF is improved by about 4 months, thus to enhance the MTTF effectively, it is needed that the diagnostic ability of each SPLC module should be strengthened. Also as the result of comparison the SPLC and the existing safety grade PLCs, the reliability and MTTF of SPLC is up to 1.6-times and up to 22,000 hours better than the existing PLCs.

• The Journal of the Korea institute of electronic communication sciences
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• v.18 no.6
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• pp.1081-1086
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• 2023

The rapid growth and increasing complexity of modern networks have highlighted the limitations of traditional network architectures. The emergence of SDN (Software-Defined Network) in response to these challenges has changed the existing network environment. The SDN separates the control unit and the data unit, and adjusts the network operation using a centralized controller. However, this structure has also recently caused a huge amount of traffic due to the rapid spread of numerous Internet of Things (IoT) devices, which has not only slowed the transmission speed of the network but also made it difficult to ensure quality of service (QoS). Therefore, this paper proposes a method of load distribution by switching the IP and any server (processor) from the existing data processing scheduling technique, RR (Round-Robin), to mapping when a large amount of data flows in from a specific IP, that is, server overload and data loss.

• Journal of Bio-Environment Control
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• v.20 no.2
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• pp.93-100
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• 2011

Maintenance of adequate soil water potential during the period of crop growth is necessary to support optimum plant growth and yields. A better understanding of soil water movement within and below the rooting zone can facilitate optimal irrigation scheduling aimed at minimizing the adverse effects of water stress on crop growth and development and the leaching of water below the root zone which can have adverse environmental effects. The objective of this study was to evaluate the feasibility of using a portable irrigation controller with an Watermark sensor for the cultivation of drip-irrigated vegetable crops in a greenhouse. The control capability of the irrigation controller for a soil water potential of -20 kPa was evaluated under summer conditions by cultivating 45-day-old tomato plants grown in three differently textured soils (sandy loam, loam, and loamy sands). Water contents through each soil profile were continuously monitored using three Sentek probes, each consisting of three capacitance sensors at 10, 20, and 30 cm depths. Even though a repeatable cycling of soil water potential occurred for the potential treatment, the lower limit of the Watermark (about 0 kPa) obtained in this study presented a limitation of using the Watermark sensor for optimal irrigation of tomato plants where -20 kPa was used as a point for triggering irrigations. This problem might be related to the slow response time and inadequate soil-sensor interface of the Watermark sensor as compared to a porous and ceramic cup-based tensiometer with a sensitive pressure transducer. In addition, the irrigation time of 50 to 60 min at each of the irrigation operation gave a rapid drop of the potential to zero, resulting in over irrigation of tomatoes. There were differences in water content among the three different soil types under the variable rate irrigation, showing a range of water contents of 16 to 24%, 17 to 28%, and 24 to 32% for loamy sand, sandy loam, and loam soils, respectively. The greatest rate increase in water content was observed in the top of 10 cm depth of sandy loam soil within almost 60 min from the start of irrigation.

• Journal of the Institute of Electronics and Information Engineers
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• v.49 no.11
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• pp.86-94
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• 2012

In this paper we propose a hardware architecture of high-speed CGH (computer generated hologram) generation processor, which particularly reduces the number of memory access times to avoid the bottle-neck in the memory access operation. For this, we use three main schemes. The first is pixel-by-pixel calculation rather than light source-by-source calculation. The second is parallel calculation scheme extracted by modifying the previous recursive calculation scheme. The last one is a fully pipelined calculation scheme and exactly structured timing scheduling by adjusting the hardware. The proposed hardware is structured to calculate a row of a CGH in parallel and each hologram pixel in a row is calculated independently. It consists of input interface, initial parameter calculator, hologram pixel calculators, line buffer, and memory controller. The implemented hardware to calculate a row of a $1,920{\times}1,080$ CGH in parallel uses 168,960 LUTs, 153,944 registers, and 19,212 DSP blocks in an Altera FPGA environment. It can stably operate at 198MHz. Because of the three schemes, the time to access the external memory is reduced to about 1/20,000 of the previous ones at the same calculation speed.