• International Journal of Contents
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• v.1 no.1
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• pp.40-44
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• 2005

This paper introduces region partitioning method of non-perfect nested loops with non-uniform dependences. This kind of loop normally can't be parallelized by existing parallelizing compilers and transformations. Even when parallelized in rare instances, the performance is very poor. Based on the Convex Hull theory which has adequate information to handle non-uniform dependences, this paper proposes an enhanced region partitioning method which divides the iteration space into minimum parallel regions where all the iterations inside each parallel region can be executed in parallel by using variable renaming after copying.

• Journal of the Korean Institute of Telematics and Electronics
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• v.27 no.8
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• pp.1211-1220
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• 1990

This paper describes and implements a design method of register allocation as a required module of RISC compiler systems. It compiles a C program to a machine-independent intermediate language, translates each variable into symbolic register. After local allocation process for the symbolic registers, global register allocation is executed by applying the graph coloring algorithm. This register allocation phase is designed for a system with the large register file like RISC machines.

• Electronics and Telecommunications Trends
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• v.9 no.4
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• pp.9-21
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• 1994

Wide variety of the architectural complexity of parallel computer often makes it difficult to develop efficient programs for them. One of approaches to improve this difficulty is to program in familiar sequential languages such as Fortran or C and to parallelize sequential programs into equivalent parallel programs automatically. This paper presents an organization of parallelizing compiler which transforms sequential programs into equivalent parallel programs. The parallelizer consists mainly of syntax analysis, control and data flow analysis, program transformation, and parallel code generation. In particular, the program restructuring in this parallelizer maximizes loop parallelism.

• The Transactions of the Korea Information Processing Society
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• v.7 no.3
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• pp.962-970
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• 2000

Multithreading is attractive in that it can tolerate memory latency and synchronization by effectively overlapping communication with computation. While several compiler techniques have been developed to produce multithreaded codes from functional languages programs, there still remains a lot of works to implement loops effectively. Executing lops in a style of multithreading usually causes some overheads, which can reduce severely the effect of multirheading. This paper suggests several methods in terms of architectures or compilers which can optimize loop execution by multithreading. We then simulate and analyze them for the matrix multiplication program.

• Journal of Korea Multimedia Society
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• v.11 no.5
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• pp.703-709
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• 2008

The methodology of the compiler construction improved by well-defined parsing techniques and developments of automatic generation tools. Through them, a variety of compilers for the special applications can be developed effectively: particularly, the compiler for embedded/mobile devices. Also, as contents industry is proliferating recently, the necessity of developing a compiler which is suitable for contents system is highly increasing. These various demands can be resolved by modular techniques and automatic construction of compilers. But, optimization of compiler itself as development tools uses heuristic methods and it needs higher cost. In this paper, we suggest the parsing method which can decrease unnecessary reduce actions by analyzing the characteristics of LR parser. The suggested parsing technique uses lookahead/ states, reachable reduction goals information in parsing process and enhances the parsing efficiency by changing continuous reduce actions to one. Actually, we applied it to the front-end of ANSI C compiler and proved the parsing performance in terms of the number of reduce actions.

• Journal of KIISE:Software and Applications
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• v.32 no.8
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• pp.819-833
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• 2005

Code size reduction is ever becoming more important for compilers targeting embedded processors because these processors are often severely limited by storage constraints and thus the reduced code size can have a positively significant Impact on their performance. Various code size reduction techniques have different motivations and a variety of application contexts utilizing special hardware features of their target processors. In this work, we propose a novel technique that fully utilizes a set of hardware instructions, called the multiple load/store (MLS), that are specially featured for reducing code size by minimizing the number of memory operations in the code. To take advantage of this feature, many microprocessors support the MLS instructions, whereas no existing compilers fully exploit the potential benefit of these instructions but only use them for some limited cases. This is mainly because optimizing memory accesses with MLS instructions for general cases is an NP-hard problem that necessitates complex assignments of registers and memory off-sets for variables in a stack frame. Our technique uses a couple of heuristics to efficiently handle this problem in a polynomial time bound.

• Journal of KIISE:Computing Practices and Letters
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• v.8 no.3
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• pp.356-365
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• 2002

Test systems verify and classify the various kinds of semiconductor products. So test systems need programs that can test the various special functions of hardware modules and products. Programs can be modified, compiled and executed by engineers. Consequently, the systems needs programming languages that can be easily programmed by engineers and their compilers that can compile and execute teat programs. In this paper we discuss the environment of programming languages and their compilers for the existing domestic teat systems. We design a programming language and implement its compiler that can be conveniently used by the experienced engineers in the industry field. Experimental results show that a newly designed test system with our programming language and compiler can teat products faster than the existing test system.

• The Transactions of the Korea Information Processing Society
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• v.6 no.2
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• pp.415-424
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• 1999

Systematic telecommunication network management is essential for operating large-scale integrated networks which consist of various network components manufactured by different vendors. ISO and ITU-T recommend the CMIP-based TMN architecture for this purpose. TMN uses GDMO for the definition of managed objects, and various GDMO compilers have been developed. However, the development of management objects by using these compilers is still a difficult task. In this paper, we present a GUI-based managed objects development environment, MODE. MODE divides managed object codes by system independent code(SIC) and system dependent cede(SDC). By providing development environments for SIC and SDC, MODE can ease the development of managed objects. To show the efficiency of MODE, we develop the managed objects of an ATM switch in MODE.

• ETRI Journal
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• v.36 no.5
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• pp.856-864
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• 2014

Usually, key-establishment protocols are suggested in a security model. However, there exist several different security models in the literature defined by their respective security notions. In this paper, we study the relations between the security models of key establishment. For the chosen security models, we first show that some proven key-establishment protocols are not secure in the more restricted security models. We then suggest two compilers by which we can convert a key-establishment protocol that is secure in a specific security model into a key-establishment protocol that is still secure in a more restricted security model.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.24 no.1
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• pp.215-219
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• 2014

C programming language has undefined behaviors, which cause unintended execution of a program. When a programmer adds sanity checks without caring about undefined behaviors, compilers may misunderstand and invalidate the sanity checks. Thus, we propose an automated system to detect invalidated sanity checks by marking sanity checks in source code and checking the marks in binary code.