• Journal of the Korean Institute of Telematics and Electronics A
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• v.33A no.7
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• pp.261-268
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• 1996

Hardware-software codesign becomes improtant to effectively sagisfy perfomrance goals, because designers can trade-off in the way hardware and software components work teogether to exhibit a specified behavior. In this paper, a hardware-software pratitioning algorithm is presetned, in which the system behavioral description containing a mixture of hardware and software components is partitioned into hardware part and software part. The partitioning algorithm tries to minimize the given cost function under constraints on hardware resources or latency. Recursive moving of operations between the hardware and software parts is used to find a near optimum partition and the list scheduling approach is used to estimate the hardware area and latency. Since memory may take substantial protion of the hardware part, memory cost is included in sthe hardware cost. Experimental resutls show that our algorithm is effective.

• Proceedings of the IEEK Conference
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• 2002.07c
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• pp.1736-1739
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• 2002

The advanced in semiconductor, hardware, and software technologies enables the integration of more com- plex systems and the increasing design complexity. As system design complexity becomes more complicated, System-level design based on the If block and processor model is more needed in most of the RTL level or low level. In this paper, we present a novel approach fur the system-level design, which satisfies the various required constraints and an optimization method of image encoder based on codesign of function, algorithm, and architecture. In addition, we show an MPEG-4 encoder as a design case study. The best tradeoffs between algorithm and architecture are necessary to deliver the design with satisfying performance and area constraints. The evaluations provide the effective optimization of motion estimation, which is in charge of an amount of performance in the MPEG-4 encoder module.

• The KIPS Transactions:PartD
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• v.13D no.1 s.104
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• pp.117-124
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• 2006

Hardware and software codesign framework called PeaCE(Ptolemy extension as a Codesign Environment) was developed. It allows to express both data flow and control flow which is described as fFSM which extends traditional finite state machine. While the fFSM model provides lots of syntactic constructs for describing control flow, it has a lack of their formality and then difficulties in verifying the specification. In order to define the formal semantics of the fFSM, in this paper, firstly the hierarchical structure in the model is flattened and then the step semantics is defined. As a result, some important bugs such as race condition, ambiguous transition, and circulartransition can be formally detected in the model.

• The KIPS Transactions:PartA
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• v.9A no.4
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• pp.491-496
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• 2002

Most partitioning algorithms for hardware- software codesign do not consider scheduling. Therefore, partitioning should be performed again if time constraints art not satisfied in scheduling the partitioned results. Existing FDS-applied methods which consider scheduling in partitioning decide the control step of the node to schedule while selecting nodes for partitioning. In selecting nodes for partitioning, several aspects should be considered together such as added cost or time due to the partition of the node, or the degree of interference due to the scheduling of the node. At this time, the induced force, which means the degree of intereference of scheduling other nodes, is computed all over the control step of the corresponding node and other depending nodes. In this paper, a new FDS-applied partitioning algorithm is proposed, where partitioning is performed using the defined scheduling urgency and relative scheduling urgency of the nodes. Since the nodes are partitioned by the computation of relative scheduling urgencies only at the earliest control step and the latest control step among the assignable steps, the time complexity for the computation of induced force could be improve. Experimental result on the benchmarks show the improvement of execution time of the proposed algorithm compared to the existing FDS-applied methods.

• Proceedings of the Korean Information Science Society Conference
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• 1999.10c
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• pp.51-53
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• 1999

시스템을 설계함에 있어 시스템의 성능과 비용 및 시간을 고려한 하드웨어 소프트웨어를 혼합한 통합설계(codesign) 환경이 많아 연구되고 있다. 통합 설계 과정을 자동화하기 위해서는 기술 언어를 툴에 맞게 자동적으로 바꾸어주는 기능이 필요하게 된다. C를 VHDL로 변환하는 방법에서 특히 동적 할당, 포인터, 재귀 호출에 대한 변환이 어렵다. 본 논문은 재귀 호출 부분을 제어부, 연산부, 입력부, 메모리로 나누어 각각을 component로 설계하게 만들었다. C언어로부터 합성 가능한 VHDL로의 변환 중 재귀 호출에 관한 연구를 수행함으로써 상위 수준에서의 시스템 설계를 할 수 있도록 도와주고, C로부터 VHDL로의 변환에 유연성을 부여하여, 설계를 자동화시키는데 기여할 수 있을 것이다.

• Proceedings of the IEEK Conference
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• 2000.07a
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• pp.419-420
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• 2000

This paper describes the innovation of VLSI design methodology in the coming decade. Technology trend of VLSI fabrication is surveyed first. Then the so-called “design crisis” is analyzed. Finally, possible design methodology to overcome the design crisis is discussed.

• Proceedings of the Korea Society for Simulation Conference
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• 1999.04a
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• pp.232-236
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• 1999

Codesign 방법론은 하드웨어와 소프트웨어가 공존하는 시스템을 설계할 때 이드의 설계를 각각의 특성에 맞는 방법을 사용함으로써 효율적인 디자인방법을 제공한다. 전체 시스템의 동작 및 성능을 검증하기 위해서는 다른 방법으로 개발된 하드웨어와 소프트웨어를 같이 시뮬레이션해야 하는데 이를 통합시뮬레이션(Co-simulation)이라고 한다. 하드웨어와 소프트웨어를 개발하는 방법이 다르기 때문에 야기되는 통합의 문제점을 해결하기 위하여 DEVS(Discrete Event System Specification)에 기반한 중간단계형태를 통한 변환방법론을 제시하고 이를 사용하여 C++ 모델과 Verilog HDL 모델간의 통합시뮬레이션을 구현함으로써 효용을 보이고자 한다.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2004.05b
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• pp.796-799
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• 2004

최근 반도체 기술과 회로 설계 기술이 발달하면서, 하드웨어와 소프트웨어 부분을 별도로 분리하여 설계하지 않고, 통합하여 설계함으로써 적은 비용으로 고성능의 시스템을 구축할 수 있는 통합설계 기반이 구축되었다. 그러나, 하드웨어와 소프트웨어가 혼재할 경우에는 두 영역 사이에서의 통신 부담이 비교적 큰 편으로 발생하여 오히려 소프트웨어로만 설계한 경우보다 성능이 떨어질 소지가 있다. 본 논문에서는 이러한 통신 부담을 줄일 수 있는 방안에 대해 세 가지를 간략히 소개하고 있다.

• Advances in Computational Design
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• v.3 no.4
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• pp.339-366
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• 2018

Parametric design systems serve as powerful assistive tools in the design process by providing a flexible approach for the generation of a vast number of design alternatives. However, contemporary parametric design systems focus primarily on low-level engineering and structural forms, without an explicit means to also take into account high-level, cognitively motivated people-centred design goals. We present a precedent-based parametric design method that integrates people-centred design "precedents" rooted in empirical evidence directly within state of the art parametric design systems. As a use-case, we illustrate the general method in the context of an empirical study focusing on the multi-modal analysis of wayfinding behaviour in two large-scale healthcare environments. With this use-case, we demonstrate the manner in which: (1). a range of empirically established design precedents -e.g., pertaining to visibility and navigation- may be articulated as design constraints to be embedded directly within state of the art parametric design tools (e.g., Grasshopper); and (2). embedded design precedents lead to the (parametric) generation of a number of morphologies that satisfy people-centred design criteria (in this case, pertaining to wayfinding). Our research presents an exemplar for the integration of cognitively motivated design goals with parametric design-space exploration methods. We posit that this opens-up a range of technological challenges for the engineering and development of next-generation computer aided architecture design systems.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2011.05a
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• pp.641-642
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• 2011

This paper presents method of constructing the embedded systems based on hardware-software codesign which is the important fields of $21^{st}$ information technology. First, we describe the classification and necessity of embedded systems, and we discuss the consideration and classification for constructing the embedded systems. Also, we discuss the embedded systems modeling. The proposed embedded systems based on hardware-software co-design is important gradually, we expect that it involve the many IT fields in the future.