• 한국통신학회논문지
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• 제35권7C호
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• pp.587-593
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• 2010

본 논문에서는 extrinsic information transfer (EXIT) chart를 이용하여 다중 안테나 시스템에서 irregular low-density parity-check (LDPC) code를 설계하는 방법을 기술한다. 다중 안테나 기반의 Irregular LDPC code 설계를 위하여 maximum a posteriori probability (MAP) 방식의 다중 안테나 검출 방식이 사용되었으며 수신기는 다중 안테나 검출기와 LDPC 복호기 사이에서 복호된 soft 정보를 주고 받는 turbo iterative 구조를 가정하였다. 다중 안테나 기반의 irregular LDPC code의 edge degree 분포는 EXIT chart와 linear optimization programming 기법을 사용하여 얻을 수 있으며 컴퓨터 시뮬레이션을 통하여 제안된 방법으로 설계된 irregular LDPC code의 성능을 다양한 환경에서 검증하였다.

• Journal of Communications and Networks
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• 제17권2호
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• pp.198-202
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• 2015

This paper presents a computationally efficient implementation of a Hamming code decoder on a graphics processing unit (GPU) to support real-time software-defined radio, which is a software alternative for realizing wireless communication. The Hamming code algorithm is challenging to parallelize effectively on a GPU because it works on sparsely located data items with several conditional statements, leading to non-coalesced, long latency, global memory access, and huge thread divergence. To address these issues, we propose an optimized implementation of the Hamming code on the GPU to exploit the higher parallelism inherent in the algorithm. Experimental results using a compute unified device architecture (CUDA)-enabled NVIDIA GeForce GTX 560, including 335 cores, revealed that the proposed approach achieved a 99x speedup versus the equivalent CPU-based implementation.

• ETRI Journal
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• 제46권2호
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• pp.175-183
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• 2024

Recently, polar code has attracted the attention of many scholars and has been developed as a code technology in coded-cooperative communication. We propose a polar code scheme based on Plotkin structure and quasi-uniform punching (PC-QUP). Then we apply the PC-QUP to coded-cooperative scenario and built to a new coded-cooperative scheme, which is called PCC-QUP scheme. The coded-cooperative scheme based on polar code is studied on the aspects of codeword construction and performance optimization. Further, we apply the proposed schemes to space-time block coding (STBC) to explore the performance of the scheme. Monte Carlo simulation results show that the proposed cooperative PCC-QUP-STBC scheme can obtain a lower bit error ratio (BER) than its corresponding noncooperative scheme.

• 한국정보처리학회논문지
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• 제4권10호
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• pp.2596-2604
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• 1997

ACK는 가상 스택 기계에 기반을 둔 EM 중간 코드로부터 레지스터 구조에 기반을 둔 SPARC 기계에 대한 목적 코드를 생성하기 위해서는 코드 확장기(code expander)를 이용하고 있다. 따라서 EM 코드로부터 SPARC 목적 코드를 생성하기 위해 스택 지향 구조로부터 레지스터 지향 구조로 변환하여야 한다. 코드 확장기를 이용한 SPARC 코드 생성 기법은 각 EM 명령어에 대해 SPARC 코드로 확장하는 루틴들로 구성되며 코드 생성기에 비해 코드의 질을 개선하기 위해 푸쉬-팝 최적화 동작을 수행한다. 하지만 코드 확장시에 별도의 자원과 관리를 요구하는 혼합 스택(hybrid stack)을 이용하고 있으며 전단부의 정보 손실로 레지스터 윈도우를 이용한 효율적인 매개변수 전달을 고려하지 않는다. 본 논문에서는 ACK의 전체적인 구조의 변경 없이 목적 기계의 스택과 매개변수 전달을 고려하나 효율적인 SPARC 코드를 생성하기 위해 EM 트리를 이용한 SPARC 코드 확장기를 설계하고 구현하였다. 이를 위해, 순차적인 EM 코드를 입력으로 받아 스택 속성을 반영한 트리로 구성하며 혼합 스택을 제거하기 위해 지역 변수 정보를 별도로 관리하였다. EM 트리의 순회 및 확장 과정에서 목적 코드를 생성할 수 있는 루틴을 통하여 목적 코드를 출력하며 추출된 정보와 노드의 성격에 출력 시기와 목적 코드를 결정한다.

• 한국지능시스템학회논문지
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• 제19권2호
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• pp.180-184
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• 2009

저전력 환경에서의 메모리 집적도가 증가함에 따라 메모리는 soft error에 매우 민감해졌다. 오류 정정 코드는 일반적으로 양산 이후 메모리의 soft error를 수정하기 위해서 사용된다. 본 논문에서는 새로운 저전력 오류 정정 코드의 설계방법을 제안한다. 오류 정정 코드의 전력소비는 parity check 행렬의 선택을 통해 최소화 될 수 있다. 따라서 오류 정정 코드의 설계는 비선형 최적화 문제로 포함되는데 우리는 다양한 유전 연산자를 포함하는 유전자 알고리즘을 이용하여 이 문제를 해결한다. 제안하는 방법을 Hamming code와 Hsiao code에 적용하여 그 효율성을 입증하였다.

• Structural Engineering and Mechanics
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• 제50권3호
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• pp.323-347
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• 2014

This paper proposes a Particle Swarm Optimization (PSO) algorithm, which is improved by making use of the Harmony Search (HS) approach and called HS-PSO algorithm. A computer code is developed for optimal sizing design of non-linear steel frames with various semi-rigid and rigid beam-to-column connections based on the HS-PSO algorithm. The developed code selects suitable sections for beams and columns, from a standard set of steel sections such as American Institute of Steel Construction (AISC) wide-flange W-shapes, such that the minimum total cost, which comprises total member plus connection costs, is obtained. Stress and displacement constraints of AISC-LRFD code together with the size constraints are imposed on the frame in the optimal design procedure. The nonlinear moment-rotation behavior of connections is modeled using the Frye-Morris polynomial model. Moreover, the P-${\Delta}$ effects of beam-column members are taken into account in the non-linear structural analysis. Three benchmark design examples with several types of connections are presented and the results are compared with those of standard PSO and of other researches as well. The comparison shows that the proposed HS-PSO algorithm performs better both than the PSO and the Big Bang-Big Crunch (BB-BC) methods.

• 대한기계학회논문집A
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• 제22권1호
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• pp.148-159
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• 1998

Spot welding palys a key role in increasing productivity and weight reduction of the final products. This paper proposes a systematic approach on the design of spot weld configuration, dealing with the requried number and location of spot weld joints under the given design parameters, such as the applied loads, lap area, and individual spot weld strength. The optimal design of a spot-welded joint is postulated as a state when the safety factors of all spot weld points (i) are evenly distributed and (ii) reach maximum value. A CAD program is developed to arrange the optimal location of each spot weld based on the derived objective function and constraints. The CAD tool integrates the optimization procedure with Finite Element Analysis (FEA) code through an interface. The interface automatically provides geometrical data and mesh configuration for different spot weld locations to FEA model. It also extracts the transmitted load of each spot weld from the FEA code, and allows the optimization code predict an improved arrangement of spot weld locations. The feasibility of the developed approach is demonstrated by the selected examples.

• IEIE Transactions on Smart Processing and Computing
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• 제3권2호
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• pp.96-102
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• 2014

The embedded processor market has grown rapidly and consistently with the appearance of mobile devices. In an embedded system, the power consumption and execution time are important factors affecting the performance. The system performance is determined by both hardware and software. Although the hardware architecture is high-end, the software runs slowly due to the low quality of codes. This study compared the performance of two major compilers, LLVM and GCC on a32-bit EISC embedded processor. The dynamic instructions and static code sizes were evaluated from these compilers with the EEMBC benchmarks.LLVM generally performed better in the ALU intensive benchmarks, whereas GCC produced a better register allocation and jump optimization. The dynamic instruction count and static code of GCCwere on average 8% and 7% lower than those of LLVM, respectively.

• 한국전산유체공학회지
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• 제11권1호
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• pp.57-66
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• 2006

An optimal shape design approach is presented for a subsonic S-shaped intake using aerodynamic sensitivity analysis. Two-equation turbulence model is employed to capture strong counter vortices in the S-shaped duct more precisely. Sensitivity analysis is performed for the three-dimensional Navier-Stokes equations coupled with two-equation turbulence models using a discrete adjoint method For code validation, the result of the flow solver is compared with experiment data and other computational results of bench marking test. To study the influence oj turbulence models and grid refinement on the duct flow analysis, the results from several turbulence models are compared with one another and the minimum number of grid points, which can yield an accurate solution is investigated The adjoint variable code is validated by comparing the complex step derivative results. To realize a sufficient and flexible design space, NURBS equations are introduced as a geometric representation and a new grid modification technique, Least Square NURBS Grid Approximation is applied With the verified flow solver, the sensitivity analysis code and the geometric modification technique, the optimization of S-shaped intake is carried out and the enhancement of overall intake performance is achieved The designed S-shaped duct is tested in several off-design conditions to confirm the robustness of the current design approach. As a result, the capability and the efficiency of the present design tools are successfully demonstrated in three-dimensional highly turbulent internal flow design and off-design conditions.

• Composites Research
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• 제14권6호
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• pp.38-46
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• 2001

본 연구에서는, 전자파 흡수능을 가진 경사 복합재료 적층판를 설계할 수 있는 최적화 코드를 개발하였다. 또한, 유리 섬유/에폭시 직조 적층판, 알루미늄 첨가물을 함유간 유리섬유/에폭시 직조 적층판과 카본/에폭시 직조 적층판의 유전율을 구하고, 최적화 로드를 이용하여 3층형 전자파 흡수 복합재료 적층판을 개발하였다. 실험에 사용된 복합재료 적층판은 모두 전자기적으로 면내등방성을 가지며 따라서, 동축선과 망분석기를 이용하여 유전율을 측정하였다. 이 로드는 전자기적으로 직교이방성을 가지는 고분자기지 복합재료의 적층각을 포함한 다양한 변수를 고려할 수 있다.