• 제목/요약/키워드: Clock generation

검색결과 133건 처리시간 0.026초

사례기반의 암전류 원인 진단 모델링 및 표준화 (Case Based Diagnosis Modeling of Dark Current Causes and Standardization of Diagnosis Process)

  • 조행득
    • 한국자동차공학회논문집
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    • 제25권2호
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    • pp.149-156
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    • 2017
  • Various kinds of accessories(e.g., clock, radio, automatic door locks, alarm devices, etc.) or unit components (e.g., black box, navigation system, alarm, private audio, etc.) require dark current even when the vehicle power is turned off. However, accessories or unit components can be the causes of excessive dark current generation. It results in battery discharge and the vehicle's failure to start. Therefore, immediate detection of abnormal dark current and response are very important for a successful repair job. In this paper, we can increase the maintenance efficiency by presenting a standardized diagnostic process for the measurement of the dark current and the existing problem. As a result of the absence of a system to block the dark current in a vehicle, diagnosis and repair were performed immediately by using a standardized dark current diagnostic process.

Introducing Software Defined Radio to 4GWireless: Necessity, Advantage, and Impediment

  • Zamat, Hassan;Nassar, Carl R.
    • Journal of Communications and Networks
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    • 제4권4호
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    • pp.344-350
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    • 2002
  • This work summarizes the current state of the art in software radio for 4G systems. Specifically, this work demonstrates that classic radio structures, e.g., heterodyne reception, homodyne reception, and their improved implementations, are inadequate selections for multi-mode reception. This opens the door to software defined radio, a novel reception architecture which promises ease in multi-band, multi-protocol design. The work presents the many advantages of such an architecture, including flexibility, reduced cost via component reduction, and improved reliability via, e.g., the elimination of environmental instability. The work also explains the limitations that currently curtail the widespread use of SDR, including issues surrounding A/D converters, management of software and power, and clock generation. This provides direction for future research to enable the broad applicability of SDR in 4G cellular and beyond.

고해상도 컬러 영상 워핑의 실시간 구현을 위한 영상 캐시 알고리즘 (Image Cache Algorithm for Real-time Implementation of High-resolution Color Image Warping)

  • 이유진;류정래
    • 제어로봇시스템학회논문지
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    • 제22권8호
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    • pp.643-649
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    • 2016
  • This paper presents a new image cache algorithm for real-time implementation of high-resolution color image warping. The cache memory is divided into four cache memory modules for simultaneous readout of four input image pixels in consideration of the color filter array (CFA) pattern of an image sensor and CFA image warping. In addition, a pipeline structure from the cache memory to an interpolator is shown to guarantee the generation of an output image pixel at each system clock cycle. The proposed image cache algorithm is applied to an FPGA-based real-time color image warping, and experimental results are presented to show the validity of the proposed method.

2.5G SDH 전자파 감소용 저역통과필터 설계 (Design of Low Pass Filter to reduce EMI from 2.SG SDH system)

  • 이성원;김영범
    • 한국시뮬레이션학회논문지
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    • 제10권4호
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    • pp.21-30
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    • 2001
  • In this paper, EMI measurement, the STGU simulation being conducted, filter design, its characteristics, and its implementation to the PCB, and finally test results are discussed. When the low pass filter was implemented within the STGU, the power of EMI decreased more than 20dBm. Finally, when TE and MTIE, two important quality measure in synchronous reference clock, was assessed, ITU-T G813 requirement was satisfied. EMI(Electromagnetic Interface) is a measure of electomagnetic radiation from equipment in the range of 10KHz to 3GHz, and can cause unexpected reactions of electronics/electrical equipment. In this study, for safe and stable communication operation, a STGU (System Timing Generation Unit), which is a 2.5G SDH System and a major EMI source, was employed to simulate electromagnetic interface. Using Open-Site test, the power of fundamental frequency of EMI of interest and its harmonics were measured. Also, a low pass filter at cut-off frequency of 2GHz was specifically designed for this study to minimize the effect of EMI between electronic components.

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Compact implementations of Curve Ed448 on low-end IoT platforms

  • Seo, Hwajeong
    • ETRI Journal
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    • 제41권6호
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    • pp.863-872
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    • 2019
  • Elliptic curve cryptography is a relatively lightweight public-key cryptography method for key generation and digital signature verification. Some lightweight curves (eg, Curve25519 and Curve Ed448) have been adopted by upcoming Transport Layer Security 1.3 (TLS 1.3) to replace the standardized NIST curves. However, the efficient implementation of Curve Ed448 on Internet of Things (IoT) devices remains underexplored. This study is focused on the optimization of the Curve Ed448 implementation on low-end IoT processors (ie, 8-bit AVR and 16-bit MSP processors). In particular, the three-level and two-level subtractive Karatsuba algorithms are adopted for multi-precision multiplication on AVR and MSP processors, respectively, and two-level Karatsuba routines are employed for multi-precision squaring. For modular reduction and finite field inversion, fast reduction and Fermat-based inversion operations are used to mitigate side-channel vulnerabilities. The scalar multiplication operation using the Montgomery ladder algorithm requires only 103 and 73 M clock cycles on AVR and MSP processors.

고효율 Boost DC-DC 변환기를 위한 Line Regulation 향상에 대한 연구 (A Study On The Improved Line Regulation For High Efficiency BoostDC-DCConverter)

  • 두수연;정성연;정진일;곽계달
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2007년도 심포지엄 논문집 정보 및 제어부문
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    • pp.391-392
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    • 2007
  • In recent, portable information and communication terminals such as a notebook computer, an electronic pocketbook, a hand personal computer(PC) have been regards as the leading role in the coming next generation portable multimedia terminals which have hi-directional wireless data communication capability and can receive information and communication services such as electronic mail, database searching, and electronic shopping at anytime and anyplace. Therefore, in this paper, the circuit is simulated by 0.35um memory process used Current Limit for Boost DC-DC converter. Supply voltage $2.5V{\sim}3.3V$, output voltage 5V, Clock Frequency 1MHz, output current 200mA and line regulation decreased 12.46%.

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LEO Satellite Time Synchronization Architecture

  • Kwon, Ki-Ho;Kim, Day-Young;Lee, Jong-In;Kim, Hak-Jung;Lee, Sang-Jeong
    • 한국항해항만학회:학술대회논문집
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    • 한국항해항만학회 2006년도 International Symposium on GPS/GNSS Vol.1
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    • pp.367-370
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    • 2006
  • A GPS-based time synchronization technique employing a refined HW circuitry and SW algorithm is considered as fine time-management system for Low Earth Orbit (LEO) remote sensing satellites. By synchronizing the On-Board Time (OBT) within satellites to the GPS 1PPS, a very expensive, highly accurate on-board clock is not required to determine the precise on-board time management. Also, the satellite command generation in ground stations and postprocessing of earth observation data which a particular image is acquired. This paper analyses on-orbit verification of the existing satellite time sync architecture and presents a new time sync architecture, operation and relation between the OBT and the GPS time.

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남해안 어촌마을 주거시설의 전력소비량 실측조사 (Measurement of Electric Power Consumption of Residences in Southeastern Fishing Village of Korea)

  • 황광일
    • 한국항해항만학회지
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    • 제36권6호
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    • pp.501-506
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    • 2012
  • 해양에너지를 비롯한 신재생에너지를 이용한 분산형 발전시스템 설계의 기초자료로 활용하기 위해 본 연구에서는 도서 주민의 전력소비량을 실측 분석하고 시기별 전력소비 패턴을 개발하였다. 실측조사는 남해안에 위치한 곤리도의 5가구를 대상으로 2010년 10월부터 2012년 2월까지 수행되었다. 월평균 전력소비량은 가구에 따라 12월 혹은 1월에 최대값이 발생하였다. 가구별 월간 전력소비량은 H가구가 J가구보다 2~3배 많았지만 가구별 1인당 월평균 전력소비량은 J가구가 H가구보다 10~30% 가량 많은 것으로 조사되었다. 시각별 전력소비 패턴을 개발한 결과 여름철에는 20시에서 자정 사이에 최대 전력소비가 발생하고, 겨울철은 여름철에 비하여 하루 동안의 전력소비 변화는 완만하지만 18시 이후 자정까지의 시간대에 전력소비가 증가하는 경향을 보였다. 가구별 주중과 주말의 전력소비 패턴은 매우 유사한 것으로 나타났다.

유전알고리즘 기반 콘크리트 구조물의 최적화 설계를 위한 멀티코어 퍼스널 컴퓨터 클러스터의 확장 가능성 연구 (A Study on the Scalability of Multi-core-PC Cluster for Seismic Design of Reinforced-Concrete Structures based on Genetic Algorithm)

  • 박근형;최세운;김유석;박효선
    • 한국전산구조공학회논문집
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    • 제26권4호
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    • pp.275-281
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    • 2013
  • 본 논문에서는 유전알고리즘을 사용하여 철근콘크리트 구조물의 최적 지진설계를 효율적으로 수행하기 위해 클러스터를 사용하는 경우 확장성을 확인하였다. 클러스터를 구성하는 코어프로세서의 개수를 증가시키면서 유전알고리즘의 각 세대에 소요되는 시간의 감소를 관찰하였다. 단일 퍼스널 컴퓨터의 구성을 분류한 후, wall-clock time과 암달의 법칙으로 예상된 값을 비교하여 예상되었던 병목현상을 확인하였다. 이에 클러스터의 확장성에서 복합적인 요인에 의한 경향을 확인할 수 있었다. 병목현상의 물리적인 요인과 알고리즘 측면에서의 요인을 구분하기 위해 유전알고리즘의 개채수를 나누어 실험을 수행하여 결과를 확인하였다.

블루투스 기저대역을 위한 상관기와 액세스 코드 생성 모듈의 설계 (Design of a Correlator and an Access-code Generator for Bluetooth Baseband)

  • 황선원;이상훈;신위재
    • 융합신호처리학회논문지
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    • 제6권4호
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    • pp.206-211
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    • 2005
  • 본 논문에서는 블루투스 기저대역에 적용하기 위한 상관기와 액세스 코드 생성모듈의 설계에 대해 다룬다. 상관기와 액세스 코드 생성 모듈은 블루투스 유닛 사이의 연결설정과 패킷판별, 클록 동기화를 수행한다. 상관기 모듈은 1Mb/s 전송속도를 가지는 입력신호에 대해 슬라이딩 윈도우 상관을 취하여 유용한 패킷판별과 클록 동기화를 행하며, 그 구성은 Wallace tree 구조의 CSA(Carry Save Adder)와 임계 값 판별기로 구성된다. 액세스 코드 생성모듈은 블루투스 표준안에서 제시한 4단계의 생성과정에 따라 설계하였으며 BCH(Bose-Chadhuri-Hocquenghem)순회 부호기(cyclic code)와 제어장치로 구성된다. 의사 랜덤 시퀀스는 동기화 문제를 해결하기 위해 임의의 저장장치에 저장된 형태로 사용하였다. 본 논문에서 제시한 상관기와 액세스 코드 생성모듈은 하드웨어 묘사언어인 VHDL로 설계되었으며 시뮬레이션 및 테스트를 위해 Xilinx FPGA를 사용하여 검증하였다. 설계된 회로의 합성결과는 치대 4.689ns의 임계지연과 최대 7-bit까지의 상관허용 오차를 보여준다.

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