• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.8 no.2
• /
• pp.430-439
• /
• 2004

This paper describes a design of 8192/2048-point FFT/IFFT processor (CFFT8k2k), which performs multi-carrier modulation/demodulation in OFDM-based DVB-T receiver. Since a large size FFT requires a large buffer memory, two design techniques are considered to achieve memory-efficient implementation of 8192-point FFT/IFFT. A hybrid structure, which is composed of radix-4 single-path delay feedback (R4SDF) and radix-4 single-path delay commutator (R4SDC), reduces its memory by 20% compared to R4SDC structure. In addition, a memory reduction of about 24% is achieved by a novel two-step convergent block floating-point scaling. As a result, it requires only 57% of memory used in conventional design, reducing chip area and power consumption. The CFFT8k2k core is designed in Verilog-HDL, and has about 102,000 Bates, RAM of 292k bits, and ROM of 39k bits. Using gate-level netlist with SDF which is synthesized using a $0.25-{\um}m$ CMOS library, timing simulation show that it can safely operate with 50-MHz clock at 2.5-V supply, resulting that a 8192-point FFT/IFFT can be computed every 164-${\mu}\textrm{s}$. The functionality of the core is fully verified by FPGA implementation, and the average SQNR of 60-㏈ is achieved.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.20 no.11
• /
• pp.2093-2099
• /
• 2016

This paper describes a design of crypto-processor that supports multiple block cipher algorithms of PRESENT, ARIA, and AES. The crypto-processor integrates three cores that are PRmo (PRESENT with mode of operation), AR_AS (ARIA_AES), and AES-16b. The PRmo core implementing 64-bit block cipher PRESENT supports key length 80-bit and 128-bit, and four modes of operation including ECB, CBC, OFB, and CTR. The AR_AS core supporting key length 128-bit and 256-bit integrates two 128-bit block ciphers ARIA and AES into a single data-path by utilizing resource sharing technique. The AES-16b core supporting key length 128-bit implements AES with a reduced data-path of 16-bit for minimizing hardware. Each crypto-core contains its own on-the-fly key scheduler, and consecutive blocks of plaintext/ciphertext can be processed without reloading key. The crypto-processor was verified by FPGA implementation. The crypto-processor implemented with a $0.18{\mu}m$ CMOS cell library occupies 54,500 gate equivalents (GEs), and it can operate with 55 MHz clock frequency.

• Journal of KIISE:Databases
• /
• v.31 no.6
• /
• pp.684-698
• /
• 2004

The Hippocratic database model recently proposed by Agrawal et al. incorporates privacy protection capabilities into relational databases. Since the Hippocratic database is based on the relational database, it needs extensions to be adapted for XML databases. In this paper, we propose the Hippocratic XML database model, an extension of the Hippocratic database model for XML databases and present an efficient access control mechanism under this model. In contrast to relational data, XML data have tree-like hierarchies. Thus, in order to manage these hierarchies of XML data, we extend and formally define such concepts presented in the Hippocratic database model as privacy preferences, privacy policies, privacy authorizations, and usage purposes of data records. Next, we present a new mechanism, which we call the authorization index, that is used in the access control mechanism. This authorization index, which is Implemented using a multi-dimensional index, allows us to efficiently search authorizations implied by the authorization granted on the nearest ancestor using the nearest neighbor search technique. Using synthetic and real data, we have performed extensive experiments comparing query processing time with those of existing access control mechanisms. The results show that the proposed access control mechanism improves the wall clock time by up to 13.6 times over the top-down access control strategy and by up to 20.3 times over the bottom-up access control strategy The major contributions of our paper are 1) extending the Hippocratic database model into the Hippocratic XML database model and 2) proposing an efficient across control mechanism that uses the authorization index and nearest neighbor search technique under this model.

• Journal of the Korea Academia-Industrial cooperation Society
• /
• v.11 no.3
• /
• pp.896-905
• /
• 2010

The sensor networks can be used attractively for various application areas. Time synchronization is important for any Ubiquitous Sensor Networks (USN) systems. USN makes extensive use of synchronized time in many contexts for data fusion. However existing time synchronization protocols are available only for homogeneous sensor nodes of USN. It needs to be extended or redesigned in order to apply to the USN with heterogeneous sensor nodes. Because heterogeneous sensor nodes have different clock sources with the SinkNode of USN, it is impossible to be synchronized global time. In addition, energy efficiency is one of the most significant factors to influence the design of sensor networks, as sensor nodes are limited in power, computational capacity, and memory. In this paper, we propose specific time synchronization based on master-slave topology for the global time synchronization of USN with heterogeneous sensor nodes. The time synchronization master nodes are always able to be synchronized with the SinkNode. Then time synchronization master nodes enable time synchronization slave nodes to be synchronized sleep periods. The proposed master-slave time synchronization for heterogeneous sensor nodes of USN is also helpful for power saving by maintaining maximum sleep time.

• Journal of the Institute of Convergence Signal Processing
• /
• v.10 no.4
• /
• pp.274-279
• /
• 2009

The flow of a universal system-level design methodology consists of system specification, system-level hardware/software partitioning, co-design, co-verification using virtual or physical prototype, and system integration. In this paper, verification environments based-on SystemVerilog and SystemC, one is native-code co-verification environment which makes prompt functional verification possible and another is SystemVerilog layered testbench which makes clock-level verification possible, are implemented. In native-code co-verification, HW and SW parts of SoC are respectively designed with SystemVerilog and SystemC after HW/SW partitioning using SystemC, then the functional interaction between HW and SW parts is carried out as one simulation process. SystemVerilog layered testbench is a verification environment including corner case test of DUT through the randomly generated test-vector. We adopt SystemC to design a component of verification environment which has multiple inheritance, and we combine SystemC design unit with the SystemVerilog layered testbench using SystemVerilog DPI and ModelSim macro. As multiple inheritance is useful for creating class types that combine the properties of two or more class types, the design of verification environment adopting SystemC in this paper can increase the code reusability.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.19 no.1
• /
• pp.178-184
• /
• 2015

This paper proposes a hardware architecture for high performance Deblocking filter(DBF) in High Efficiency Video Coding for UHD(Ultra High Definition) videos. This proposed hardware architecture which has less processing time has a 4-stage pipelined architecture with two filters and parallel boundary strength module. Also, the proposed filter can be used in low-voltage design by using clock gating architecture in 4-stage pipeline. The segmented memory architecture solves the hazard issue that arises when single port SRAM is accessed. The proposed order of filtering shortens the delay time that arises when storing data into the single port SRAM at the pre-processing stage. The DBF hardware proposed in this paper was designed with Verilog HDL, and was implemented with 22k logic gates as a result of synthesis using TSMC 0.18um CMOS standard cell library. Furthermore, the dynamic frequency can process UHD 8k($7680{\times}4320$) samples@60fps using a frequency of 150MHz with an 8K resolution and maximum dynamic frequency is 285MHz. Result from analysis shows that the proposed DBF hardware architecture operation cycle for one process coding unit has improved by 32% over the previous one.

• Horticultural Science & Technology
• /
• v.28 no.3
• /
• pp.409-414
• /
• 2010

The first drainage time in a day was controlled for precise irrigation management with low consumption of nutrient solution in tomato perlite bag culture system by measuring water level of drained water in drainage catchment part. This method automatically adjusted the irrigation time under any condition of light, temperature and humidity, resulting in stable water content in substrates. However, it was difficult to keep the time consistent as they were set. It drained with the deviation of 20 min in the treatment in which the first drainage time was set at 10:00 and 50 min in the treatment set at 10:30. The first drainage time was not constant, but the drain occurred stably before noon in the treatment of which irrigation frequency was longer than 30 min. The drainage ratio was better balanced in all the treatments using drainage level sensors than the treatment using time clock for irrigation control. High water and fertilizer efficiencies were obtained. Although the growth, total yield and sugar content were not significantly different between the treatments, fruit weight was higher in the treatments using drainage level sensors than that using timer.

• Journal of the Korean Arthroscopy Society
• /
• v.13 no.2
• /
• pp.143-148
• /
• 2009

Purpose: To investigate the causes of failure on ACL reconstructions and evaluate the effectiveness of one stage revision ACL reconstructions. Materials and Methods: From November 2004 to July 2008, thirty three patients who had got revision ACL recontstructions after reruptures of ACL were evaluated. The causes of failure of ACL reruptures were 22 vertical femoral tunnels, 7 neglected PLRI, 3 severe traumas and 1 deep infection after ACL reconstruction. The femoral tunnels were aimed at the 10 or 2 o'clock position and the tibial tunnels were used with previous tunnels. Previous femoral screws from the improper femoral tunnels were removed and filled with the new allograft bones. Results: The average periods of follow up were 22.2 months (12~52 months). There was improvement on an average Lysholm knee score from $61.5{\pm}16.8$ to $86.3{\pm}11.5$, IKDC score from $63.9{\pm}15.1$ to $81.3{\pm}14.3$. Mean side to side difference was decreased from $6.0{\pm}2.2\;mm$ to $1.6{\pm}1.4\;mm$ using KT-2000 arthrometer. Conclusion: One stage revision ACL reconstruction can be a useful method with good clinical results.

• Cross-Cultural Studies
• /
• v.50
• /
• pp.225-259
• /
• 2018

In this study, according to the Institut d'Estudis Catalan, it is noted that the traditional Catalan time telling system is essentially based on delineating time by the use of the 'quarts (=quarters)' of an hour. In this fasion, to tell the time 8:15, 8:30 and 8:45 they use '${\acute{E}}s$ un quart de nou.,' '$S{\acute{o}}n$ dos quarts de nou.,' and '$S{\acute{o}}n$ tres quarts de nou.,' but do not use constructions such as '$S{\acute{o}}n$ les vuit i quinze.,' '$S{\acute{o}}n$ les vuit i trenta/mitja.,' '$S{\acute{o}}n$ les vuit i quaranta-cinc.,' because these expressions are considered to be as dialectal variants or international notation-based variants. Moreover, the traditional Catalan time telling system does not use cardinal numbers, except in the case of 'cinc (five)' and 'deu (ten).' These linguistic phenomenon cause the invention of a unique Catalan digital watch, and has noted special designs for the creation of a Catalan analogue watch. For this reason, the quarter system in colloquial Catalan provokes an enormous interpretative ambiguity in daily routine expressions with 'quarts' like '$S{\acute{o}}n$ quarts of nou.' or 'entre dos i tres quarts' whose meaning is not delineated between sixteen and forty-four minutes. We will argue that the traditional Catalan time telling expressions do not have the use of the subtractive system, and the fraction word 'quart' lacks a specific meaning of fifteen minutes because the Catalan word 'quart' is etymologically related to the classical public bell system, not definitively to the traditional clock system.

• 재활복지
• /
• v.22 no.3
• /
• pp.225-257
• /
• 2018

The purpose of this study is to find the application point of hearing augmentation technology development through examining the risk context experience of people with hearing impairment and the use of assistive device used as an alternative technology. Data of 355 people with hearing impairment with official disability grading was analyzed. The results of this study are first, research participants had no experience of recognizing any sound or vibration in situations highest in the order of means of transportation, material, and nature. Especially the ratio of being unable to recognize the sound and vibration of means of transportation was high, which implies the high possibility of people with hearing impairment experiencing risk. Secondly, the risk context that people with hearing impairment will most likely to experience are highest in the order of traffic accident, pedestrian accident, and daily life at home. Thirdly, the recognition of 2G phone/smart phone, vibrating digital alarm clock, light bar, vibrating wrist watch as assistive device for risk context awareness and notification was high and the satisfaction level of 2G phone/smart phone was the highest. Fourthly, the research participants had high recognition of assistive device for communication in the order of hearing aid, smart phone, videophone, cochlear implant and 2G phone and it was found that the satisfaction level and communication improvement level was the highest using the smart phone. Lastly, for the development of hearing augmentation technology the research participants recognized the importance of portable/wear convenience, price, and motion accuracy and for notification delivery means they preferred the method of using sight(text and light). Based on the results of this study policy and practical plans for hearing augmentation technology development for people with hearing impairment in risk context are proposed.